Add support for Google ChromeEC
Google ChromeEC is an EC with completely open source firmware. See https://gerrit.chromium.org/gerrit/gitweb?p=chromiumos/platform/ec.git;a=summary for the EC firmware source code (aka more information about the ChromeEC) This patch adds support for the ChromeEC on coreboot's side. Great thanks to the ChromeEC team for this amazing work. It's another important milestone towards a free and open firmware stack on modern hardware. Change-Id: Iace78af9d291791d2f5f80ccca1587b418738cec Signed-off-by: Stefan Reinauer <reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/2481 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer
Ronald G. Minnich
parent
50f313c8b2
commit
d6682e88af
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@ -1,5 +1,6 @@
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source src/ec/acpi/Kconfig
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source src/ec/compal/Kconfig
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source src/ec/google/Kconfig
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source src/ec/lenovo/Kconfig
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source src/ec/smsc/Kconfig
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source src/ec/quanta/Kconfig
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@ -1,2 +1,2 @@
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subdirs-$(CONFIG_EC_ACPI) += acpi
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subdirs-y += compal lenovo smsc quanta
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subdirs-y += compal google lenovo smsc quanta
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@ -0,0 +1 @@
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source src/ec/google/chromeec/Kconfig
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@ -0,0 +1 @@
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subdirs-$(CONFIG_EC_GOOGLE_CHROMEEC) += chromeec
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@ -0,0 +1,11 @@
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config EC_GOOGLE_CHROMEEC
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bool
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help
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Google's Chrome EC
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config EC_GOOGLE_API_ROOT
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depends on EC_GOOGLE_CHROMEEC
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string "Path to the EC API include file"
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default "/usr/include"
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help
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Path to the ec API file (ec/ec_commands.h).
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@ -0,0 +1,5 @@
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ramstage-y += ec.c
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smm-y += ec.c
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romstage-y += ec.c
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CFLAGS += -I $(call strip_quotes,$(CONFIG_EC_GOOGLE_API_ROOT))
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@ -0,0 +1,36 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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// Scope (EC0)
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Device (AC)
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{
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Name (_HID, "ACPI0003")
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Name (_PCL, Package () { \_SB })
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Method (_PSR)
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{
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Return (ACEX)
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}
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Method (_STA)
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{
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Return (0x0F)
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}
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}
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@ -0,0 +1,230 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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// Scope (EC0)
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Device (BAT0)
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{
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Name (_HID, EISAID ("PNP0C0A"))
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Name (_UID, 1)
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Name (_PCL, Package () { \_SB })
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Name (PBIF, Package () {
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0x00000001, // 0x00: Power Unit: mAh
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0xFFFFFFFF, // 0x01: Design Capacity
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0xFFFFFFFF, // 0x02: Last Full Charge Capacity
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0x00000001, // 0x03: Battery Technology: Rechargeable
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0xFFFFFFFF, // 0x04: Design Voltage
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0x00000003, // 0x05: Design Capacity of Warning
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0xFFFFFFFF, // 0x06: Design Capacity of Low
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0x00000001, // 0x07: Capacity Granularity 1
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0x00000001, // 0x08: Capacity Granularity 2
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"", // 0x09: Model Number
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"", // 0x0a: Serial Number
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"LION", // 0x0b: Battery Type
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"" // 0x0c: OEM Information
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})
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Name (PBIX, Package () {
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0x00000000, // 0x00: Revision
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0x00000001, // 0x01: Power Unit: mAh
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0xFFFFFFFF, // 0x02: Design Capacity
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0xFFFFFFFF, // 0x03: Last Full Charge Capacity
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0x00000001, // 0x04: Battery Technology: Rechargeable
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0xFFFFFFFF, // 0x05: Design Voltage
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0x00000003, // 0x06: Design Capacity of Warning
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0xFFFFFFFF, // 0x07: Design Capacity of Low
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0x00000000, // 0x08: Cycle Count
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0x00018000, // 0x09: Measurement Accuracy (98.3%?)
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0x000001F4, // 0x0a: Max Sampling Time (500ms)
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0x0000000a, // 0x0b: Min Sampling Time (10ms)
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0xFFFFFFFF, // 0x0c: Max Averaging Interval
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0xFFFFFFFF, // 0x0d: Min Averaging Interval
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0x00000001, // 0x0e: Capacity Granularity 1
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0x00000001, // 0x0f: Capacity Granularity 2
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"", // 0x10 Model Number
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"", // 0x11: Serial Number
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"LION", // 0x12: Battery Type
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"" // 0x13: OEM Information
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})
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Name (PBST, Package () {
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0x00000000, // 0x00: Battery State
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0xFFFFFFFF, // 0x01: Battery Present Rate
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0xFFFFFFFF, // 0x02: Battery Remaining Capacity
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0xFFFFFFFF, // 0x03: Battery Present Voltage
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})
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Name (BSTP, Zero)
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// Workaround for full battery status, enabled by default
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Name (BFWK, One)
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// Method to enable full battery workaround
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Method (BFWE)
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{
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Store (One, BFWK)
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}
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// Method to disable full battery workaround
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Method (BFWD)
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{
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Store (Zero, BFWK)
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}
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Method (_STA, 0, Serialized)
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{
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If (BTEX) {
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Return (0x1F)
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} Else {
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Return (0x0F)
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}
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}
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Method (_BIF, 0, Serialized)
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{
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// Last Full Charge Capacity
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Store (BTDF, Index (PBIF, 2))
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// Design Voltage
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Store (BTDV, Index (PBIF, 4))
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// Design Capacity
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Store (BTDA, Local0)
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Store (Local0, Index (PBIF, 1))
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// Design Capacity of Warning
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Divide (Multiply (Local0, DWRN), 100, Local1, Local2)
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Store (Local2, Index (PBIF, 5))
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// Design Capacity of Low
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Divide (Multiply (Local0, DLOW), 100, Local1, Local2)
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Store (Local2, Index (PBIF, 6))
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// Get battery info from mainboard
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Store (ToString(BMOD), Index (PBIF, 9))
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Store (ToString(BSER), Index (PBIF, 10))
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Store (ToString(BMFG), Index (PBIF, 12))
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Return (PBIF)
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}
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// Extended Battery info method is disabled for now due to
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// a bug in the Linux kernel: http://crosbug.com/28747
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Method (XBIX, 0, Serialized)
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{
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// Last Full Charge Capacity
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Store (BTDF, Index (PBIX, 3))
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// Design Voltage
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Store (BTDV, Index (PBIX, 5))
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// Design Capacity
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Store (BTDA, Local0)
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Store (Local0, Index (PBIX, 2))
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// Design Capacity of Warning
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Divide (Multiply (Local0, DWRN), 100, Local1, Local2)
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Store (Local2, Index (PBIX, 6))
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// Design Capacity of Low
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Divide (Multiply (Local0, DLOW), 100, Local1, Local2)
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Store (Local2, Index (PBIX, 7))
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// Cycle Count
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Store (BTCC, Index (PBIX, 8))
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// Get battery info from mainboard
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Store (ToString(BMOD), Index (PBIX, 16))
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Store (ToString(BSER), Index (PBIX, 17))
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Store (ToString(BMFG), Index (PBIX, 19))
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Return (PBIX)
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}
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Method (_BST, 0, Serialized)
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{
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//
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// 0: BATTERY STATE
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//
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// bit 0 = discharging
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// bit 1 = charging
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// bit 2 = critical level
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//
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Store (Zero, Local1)
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// Check if AC is present
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If (ACEX) {
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If (BFCG) {
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Store (0x02, Local1)
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} ElseIf (BFDC) {
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Store (0x01, Local1)
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}
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} Else {
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// Always discharging when on battery power
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Store (0x01, Local1)
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}
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// Check for critical battery level
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If (BFCR) {
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Or (Local1, 0x04, Local1)
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}
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Store (Local1, Index (PBST, 0))
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// Notify if battery state has changed since last time
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If (LNotEqual (Local1, BSTP)) {
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Store (Local1, BSTP)
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Notify (BAT0, 0x80)
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}
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//
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// 1: BATTERY PRESENT RATE
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//
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Store (BTPR, Index (PBST, 1))
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//
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// 2: BATTERY REMAINING CAPACITY
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//
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Store (BTRA, Local1)
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If (LAnd (BFWK, LAnd (ACEX, LNot (LAnd (BFDC, BFCG))))) {
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// On AC power and battery is neither charging
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// nor discharging. Linux expects a full battery
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// to report same capacity as last full charge.
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// https://bugzilla.kernel.org/show_bug.cgi?id=12632
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Store (BTDF, Local2)
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// See if within ~3% of full
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ShiftRight (Local2, 5, Local3)
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If (LAnd (LGreater (Local1, Subtract (Local2, Local3)),
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LLess (Local1, Add (Local2, Local3))))
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{
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Store (Local2, Local1)
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}
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}
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Store (Local1, Index (PBST, 2))
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//
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// 3: BATTERY PRESENT VOLTAGE
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//
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Store (BTVO, Index (PBST, 3))
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Return (PBST)
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}
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}
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@ -0,0 +1,230 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* The mainboard must define a PNOT method to handle power
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* state notifications and Notify CPU device objects to
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* re-evaluate their _PPC and _CST tables.
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*/
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Device (EC0)
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{
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Name (_HID, EISAID ("PNP0C09"))
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Name (_UID, 1)
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Name (_GPE, Add(EC_SCI_GPI, 16))
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Name (TOFS, EC_TEMP_SENSOR_OFFSET)
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Name (TNOP, 0xFD) // Thermal sensor has no power
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Name (TBAD, 0xFE) // Thermal sensor bad reading
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Name (TNPR, 0xFF) // Thermal sensor not present
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Name (DWRN, 15) // Battery capacity warning at 15%
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Name (DLOW, 10) // Battery capacity low at 10%
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OperationRegion (ERAM, EmbeddedControl, 0x00, 0xff)
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Field (ERAM, ByteAcc, Lock, Preserve)
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{
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Offset (0x00),
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RAMV, 8, // EC RAM Version
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TSTB, 8, // Test Byte
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TSTC, 8, // Complement of Test Byte
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KBLV, 8, // Keyboard Backlight
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}
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OperationRegion (EMEM, SystemIO, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE)
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Field (EMEM, ByteAcc, NoLock, Preserve)
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{
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Offset (0x00),
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TIN0, 8, // Temperature 0
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TIN1, 8, // Temperature 1
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TIN2, 8, // Temperature 2
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TIN3, 8, // Temperature 3
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TIN4, 8, // Temperature 4
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TIN5, 8, // Temperature 5
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TIN6, 8, // Temperature 6
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TIN7, 8, // Temperature 7
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TIN8, 8, // Temperature 8
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TIN9, 8, // Temperature 9
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Offset (0x10),
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FAN0, 16, // Fan Speed 0
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Offset (0x30),
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LIDS, 1, // Lid Switch State
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PBTN, 1, // Power Button Pressed
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WPDI, 1, // Write Protect Disabled
|
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RECK, 1, // Keyboard Initiated Recovery
|
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RECD, 1, // Dedicated Recovery Mode
|
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Offset (0x40),
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BTVO, 32, // Battery Present Voltage
|
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BTPR, 32, // Battery Present Rate
|
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BTRA, 32, // Battery Remaining Capacity
|
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ACEX, 1, // AC Present
|
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BTEX, 1, // Battery Present
|
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BFDC, 1, // Battery Discharging
|
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BFCG, 1, // Battery Charging
|
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BFCR, 1, // Battery Level Critical
|
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Offset (0x50),
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BTDA, 32, // Battery Design Capacity
|
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BTDV, 32, // Battery Design Voltage
|
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BTDF, 32, // Battery Last Full Charge Capacity
|
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BTCC, 32, // Battery Cycle Count
|
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BMFG, 64, // Battery Manufacturer String
|
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BMOD, 64, // Battery Model String
|
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BSER, 64, // Battery Serial String
|
||||
BTYP, 64, // Battery Type String
|
||||
}
|
||||
|
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Method (TINS, 1, Serialized)
|
||||
{
|
||||
Switch (ToInteger (Arg0))
|
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{
|
||||
Case (0) { Return (TIN0) }
|
||||
Case (1) { Return (TIN1) }
|
||||
Case (2) { Return (TIN2) }
|
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Case (3) { Return (TIN3) }
|
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Case (4) { Return (TIN4) }
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Case (5) { Return (TIN5) }
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Case (6) { Return (TIN6) }
|
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Case (7) { Return (TIN7) }
|
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Case (8) { Return (TIN8) }
|
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Case (9) { Return (TIN9) }
|
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Default { Return (TIN0) }
|
||||
}
|
||||
}
|
||||
|
||||
Method (_CRS, 0, NotSerialized)
|
||||
{
|
||||
Name (ECMD, ResourceTemplate()
|
||||
{
|
||||
IO (Decode16,
|
||||
EC_LPC_ADDR_ACPI_DATA,
|
||||
EC_LPC_ADDR_ACPI_DATA,
|
||||
0, 1)
|
||||
IO (Decode16,
|
||||
EC_LPC_ADDR_ACPI_CMD,
|
||||
EC_LPC_ADDR_ACPI_CMD,
|
||||
0, 1)
|
||||
})
|
||||
Return (ECMD)
|
||||
}
|
||||
|
||||
Method (_REG, 2, NotSerialized)
|
||||
{
|
||||
// Initialize AC power state
|
||||
Store (ACEX, \PWRS)
|
||||
|
||||
// Initialize LID switch state
|
||||
Store (LIDS, \LIDS)
|
||||
}
|
||||
|
||||
// Lid Closed Event
|
||||
Method (_Q01, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: LID CLOSE", Debug)
|
||||
Store (LIDS, \LIDS)
|
||||
Notify (\_SB.LID0, 0x80)
|
||||
}
|
||||
|
||||
// Lid Open Event
|
||||
Method (_Q02, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: LID OPEN", Debug)
|
||||
Store (LIDS, \LIDS)
|
||||
Notify (\_SB.LID0, 0x80)
|
||||
}
|
||||
|
||||
// Power Button
|
||||
Method (_Q03, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: POWER BUTTON", Debug)
|
||||
Notify (\_SB.PWRB, 0x80)
|
||||
}
|
||||
|
||||
// AC Connected
|
||||
Method (_Q04, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: AC CONNECTED", Debug)
|
||||
Store (ACEX, \PWRS)
|
||||
Notify (AC, 0x80)
|
||||
\PNOT ()
|
||||
}
|
||||
|
||||
// AC Disconnected
|
||||
Method (_Q05, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: AC DISCONNECTED", Debug)
|
||||
Store (ACEX, \PWRS)
|
||||
Notify (AC, 0x80)
|
||||
\PNOT ()
|
||||
}
|
||||
|
||||
// Battery Low Event
|
||||
Method (_Q06, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: BATTERY LOW", Debug)
|
||||
Notify (BAT0, 0x80)
|
||||
}
|
||||
|
||||
// Battery Critical Event
|
||||
Method (_Q07, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: BATTERY CRITICAL", Debug)
|
||||
Notify (BAT0, 0x80)
|
||||
}
|
||||
|
||||
// Battery Info Event
|
||||
Method (_Q08, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: BATTERY INFO", Debug)
|
||||
Notify (BAT0, 0x81)
|
||||
}
|
||||
|
||||
// Thermal Treshold Event
|
||||
Method (_Q09, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: THERMAL THRESHOLD", Debug)
|
||||
Notify (\_TZ, 0x80)
|
||||
}
|
||||
|
||||
// Thermal Overload Event
|
||||
Method (_Q0A, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: THERMAL OVERLOAD", Debug)
|
||||
Notify (\_TZ, 0x80)
|
||||
}
|
||||
|
||||
// Thermal Event
|
||||
Method (_Q0B, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: THERMAL", Debug)
|
||||
Notify (\_TZ, 0x80)
|
||||
}
|
||||
|
||||
// USB Charger
|
||||
Method (_Q0C, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: USB CHARGER", Debug)
|
||||
}
|
||||
|
||||
// Key Pressed
|
||||
Method (_Q0D, 0, NotSerialized)
|
||||
{
|
||||
Store ("EC: KEY PRESSED", Debug)
|
||||
}
|
||||
|
||||
#include "ac.asl"
|
||||
#include "battery.asl"
|
||||
}
|
||||
|
|
@ -0,0 +1,152 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* Chrome OS Embedded Controller interface
|
||||
*
|
||||
* Constants that should be defined:
|
||||
*
|
||||
* SIO_EC_MEMMAP_ENABLE : Enable EC LPC memory map resources
|
||||
* EC_LPC_ADDR_MEMMAP : Base address of memory map range
|
||||
* EC_MEMMAP_SIZE : Size of memory map range
|
||||
*
|
||||
* SIO_EC_HOST_ENABLE : Enable EC host command interface resources
|
||||
* EC_LPC_ADDR_HOST_DATA : EC host command interface data port
|
||||
* EC_LPC_ADDR_HOST_CMD : EC host command interface command port
|
||||
* EC_LPC_ADDR_OLD_PARAM : EC host command parameter range base (old)
|
||||
* EC_OLD_PARAM_SIZE : Parameter buffer size (old)
|
||||
*/
|
||||
|
||||
// Scope is \_SB.PCI0.LPCB
|
||||
|
||||
Device (SIO) {
|
||||
Name (_UID, 0)
|
||||
Name (_ADR, 0)
|
||||
|
||||
#ifdef SIO_EC_MEMMAP_ENABLE
|
||||
Device (ECMM) {
|
||||
Name (_HID, EISAID ("PNP0C02"))
|
||||
Name (_UID, 1)
|
||||
Name (_ADR, 0)
|
||||
|
||||
Method (_STA, 0, NotSerialized) {
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Name (_CRS, ResourceTemplate ()
|
||||
{
|
||||
FixedIO (EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE)
|
||||
})
|
||||
|
||||
Name (_PRS, ResourceTemplate ()
|
||||
{
|
||||
FixedIO (EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE)
|
||||
})
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SIO_EC_HOST_ENABLE
|
||||
Device (ECUI) {
|
||||
Name (_HID, EISAID ("PNP0C02"))
|
||||
Name (_UID, 3)
|
||||
Name (_ADR, 0)
|
||||
|
||||
Method (_STA, 0, NotSerialized) {
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Name (_CRS, ResourceTemplate ()
|
||||
{
|
||||
FixedIO (EC_LPC_ADDR_HOST_DATA, 1)
|
||||
FixedIO (EC_LPC_ADDR_HOST_CMD, 1)
|
||||
FixedIO (EC_LPC_ADDR_OLD_PARAM,
|
||||
EC_OLD_PARAM_SIZE)
|
||||
})
|
||||
|
||||
Name (_PRS, ResourceTemplate ()
|
||||
{
|
||||
StartDependentFn (0, 0) {
|
||||
FixedIO (EC_LPC_ADDR_HOST_DATA, 1)
|
||||
FixedIO (EC_LPC_ADDR_HOST_CMD, 1)
|
||||
FixedIO (EC_LPC_ADDR_OLD_PARAM,
|
||||
EC_OLD_PARAM_SIZE)
|
||||
}
|
||||
EndDependentFn ()
|
||||
})
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SIO_EC_ENABLE_COM1
|
||||
Device (COM1) {
|
||||
Name (_HID, EISAID ("PNP0501"))
|
||||
Name (_UID, 1)
|
||||
Name (_ADR, 0)
|
||||
|
||||
Method (_STA, 0, NotSerialized) {
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Name (_CRS, ResourceTemplate ()
|
||||
{
|
||||
FixedIO (0x03F8, 0x08)
|
||||
IRQNoFlags () {4}
|
||||
})
|
||||
|
||||
Name (_PRS, ResourceTemplate ()
|
||||
{
|
||||
StartDependentFn (0, 0) {
|
||||
FixedIO (0x03F8, 0x08)
|
||||
IRQNoFlags () {4}
|
||||
}
|
||||
EndDependentFn ()
|
||||
})
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef SIO_EC_ENABLE_PS2K
|
||||
Device (PS2K) // Keyboard
|
||||
{
|
||||
Name (_UID, 0)
|
||||
Name (_ADR, 0)
|
||||
Name (_HID, EISAID("PNP0303"))
|
||||
Name (_CID, EISAID("PNP030B"))
|
||||
|
||||
Method (_STA, 0, NotSerialized) {
|
||||
Return (0x0F)
|
||||
}
|
||||
|
||||
Name (_CRS, ResourceTemplate()
|
||||
{
|
||||
FixedIO (0x60, 0x01)
|
||||
FixedIO (0x64, 0x01)
|
||||
IRQNoFlags () {1}
|
||||
})
|
||||
|
||||
Name (_PRS, ResourceTemplate()
|
||||
{
|
||||
StartDependentFn (0, 0) {
|
||||
FixedIO (0x60, 0x01)
|
||||
FixedIO (0x64, 0x01)
|
||||
IRQNoFlags () {1}
|
||||
}
|
||||
EndDependentFn ()
|
||||
})
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef EC_GOOGLE_CHROMEEC_CHIP_H
|
||||
#define EC_GOOGLE_CHROMEEC_CHIP_H
|
||||
|
||||
#include <device/device.h>
|
||||
#include <pc80/keyboard.h>
|
||||
|
||||
extern struct chip_operations ec_google_chromeec_ops;
|
||||
|
||||
struct ec_google_chromeec_config {
|
||||
struct pc_keyboard keyboard;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,519 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <console/console.h>
|
||||
#include <arch/io.h>
|
||||
#include <delay.h>
|
||||
|
||||
#ifdef __PRE_RAM__
|
||||
#include <arch/romcc_io.h>
|
||||
#else
|
||||
#include <device/device.h>
|
||||
#include <device/pnp.h>
|
||||
#include <elog.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <reset.h>
|
||||
#include <arch/hlt.h>
|
||||
#include "chip.h"
|
||||
#endif
|
||||
#include "ec.h"
|
||||
#include "ec_commands.h"
|
||||
#include <vendorcode/google/chromeos/chromeos.h>
|
||||
|
||||
/* an internal API to send a command to the EC and wait for response. */
|
||||
struct chromeec_command {
|
||||
u8 cmd_code; /* command code in, status out */
|
||||
u8 cmd_version; /* command version */
|
||||
const void* cmd_data_in; /* command data, if any */
|
||||
void* cmd_data_out; /* command response, if any */
|
||||
u16 cmd_size_in; /* size of command data */
|
||||
u16 cmd_size_out; /* expected size of command response in,
|
||||
* actual received size out */
|
||||
};
|
||||
|
||||
static int google_chromeec_wait_ready(u16 port)
|
||||
{
|
||||
u8 ec_status = inb(port);
|
||||
u32 time_count = 0;
|
||||
|
||||
/*
|
||||
* One second is more than plenty for any EC operation to complete
|
||||
* (and the bus accessing/code execution) overhead will make the
|
||||
* timeout even longer.
|
||||
*/
|
||||
#define MAX_EC_TIMEOUT_US 1000000
|
||||
|
||||
while (ec_status &
|
||||
(EC_LPC_CMDR_PENDING | EC_LPC_CMDR_BUSY)) {
|
||||
udelay(1);
|
||||
if (time_count++ == MAX_EC_TIMEOUT_US)
|
||||
return -1;
|
||||
ec_status = inb(port);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int google_chromeec_cmd_args_supported(void)
|
||||
{
|
||||
if (inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID) == 'E' &&
|
||||
inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1) == 'C' &&
|
||||
(inb(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_HOST_CMD_FLAGS) &
|
||||
EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED))
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int google_chromeec_command_old(struct chromeec_command *cec_command)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (cec_command->cmd_version) {
|
||||
printk(BIOS_ERR, "Invalid version for command protocol!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (google_chromeec_wait_ready(EC_LPC_ADDR_HOST_CMD)) {
|
||||
printk(BIOS_ERR, "Timeout waiting for EC ready!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Copy command data, if any. */
|
||||
for (i = 0; i < cec_command->cmd_size_in; i++)
|
||||
outb(((char*)cec_command->cmd_data_in)[i],
|
||||
EC_LPC_ADDR_OLD_PARAM + i);
|
||||
|
||||
/* Issue the command. */
|
||||
outb(cec_command->cmd_code, EC_LPC_ADDR_HOST_CMD);
|
||||
|
||||
if (google_chromeec_wait_ready(EC_LPC_ADDR_HOST_CMD)) {
|
||||
printk(BIOS_ERR, "Timeout waiting for EC process command %d!\n",
|
||||
cec_command->cmd_code);
|
||||
return 1;
|
||||
}
|
||||
|
||||
for (i = 0; i < cec_command->cmd_size_out; i++)
|
||||
((char*)cec_command->cmd_data_out)[i] =
|
||||
inb(EC_LPC_ADDR_OLD_PARAM + i);
|
||||
cec_command->cmd_code = inb(EC_LPC_ADDR_HOST_DATA);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int google_chromeec_command(struct chromeec_command *cec_command)
|
||||
{
|
||||
struct ec_lpc_host_args args;
|
||||
const u8 *d;
|
||||
u8 *dout;
|
||||
u8 cmd_code = cec_command->cmd_code;
|
||||
int csum;
|
||||
int i;
|
||||
|
||||
/* Fall back to old command protocol if necessary */
|
||||
if (!google_chromeec_cmd_args_supported())
|
||||
return google_chromeec_command_old(cec_command);
|
||||
|
||||
/* Fill in args */
|
||||
args.flags = EC_HOST_ARGS_FLAG_FROM_HOST;
|
||||
args.command_version = cec_command->cmd_version;
|
||||
args.data_size = cec_command->cmd_size_in;
|
||||
|
||||
/* Initialize checksum */
|
||||
csum = cmd_code + args.flags + args.command_version + args.data_size;
|
||||
|
||||
/* Write data and update checksum */
|
||||
for (i = 0, d = (const u8 *)cec_command->cmd_data_in;
|
||||
i < cec_command->cmd_size_in; i++, d++) {
|
||||
outb(*d, EC_LPC_ADDR_HOST_PARAM + i);
|
||||
csum += *d;
|
||||
}
|
||||
|
||||
/* Finalize checksum and write args */
|
||||
args.checksum = (u8)csum;
|
||||
for (i = 0, d = (const u8 *)&args; i < sizeof(args); i++, d++)
|
||||
outb(*d, EC_LPC_ADDR_HOST_ARGS + i);
|
||||
|
||||
|
||||
/* Issue the command */
|
||||
outb(cmd_code, EC_LPC_ADDR_HOST_CMD);
|
||||
|
||||
if (google_chromeec_wait_ready(EC_LPC_ADDR_HOST_CMD)) {
|
||||
printk(BIOS_ERR, "Timeout waiting for EC process command %d!\n",
|
||||
cec_command->cmd_code);
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Check result */
|
||||
cec_command->cmd_code = inb(EC_LPC_ADDR_HOST_DATA);
|
||||
if (cec_command->cmd_code)
|
||||
return 1;
|
||||
|
||||
/* Read back args */
|
||||
for (i = 0, dout = (u8 *)&args; i < sizeof(args); i++, dout++)
|
||||
*dout = inb(EC_LPC_ADDR_HOST_ARGS + i);
|
||||
|
||||
/*
|
||||
* If EC didn't modify args flags, then somehow we sent a new-style
|
||||
* command to an old EC, which means it would have read its params
|
||||
* from the wrong place.
|
||||
*/
|
||||
if (!(args.flags & EC_HOST_ARGS_FLAG_TO_HOST)) {
|
||||
printk(BIOS_ERR, "EC protocol mismatch\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (args.data_size > cec_command->cmd_size_out) {
|
||||
printk(BIOS_ERR, "EC returned too much data\n");
|
||||
return 1;
|
||||
}
|
||||
cec_command->cmd_size_out = args.data_size;
|
||||
|
||||
/* Start calculating response checksum */
|
||||
csum = cmd_code + args.flags + args.command_version + args.data_size;
|
||||
|
||||
/* Read data, if any */
|
||||
for (i = 0, dout = (u8 *)cec_command->cmd_data_out;
|
||||
i < args.data_size; i++, dout++) {
|
||||
*dout = inb(EC_LPC_ADDR_HOST_PARAM + i);
|
||||
csum += *dout;
|
||||
}
|
||||
|
||||
/* Verify checksum */
|
||||
if (args.checksum != (u8)csum) {
|
||||
printk(BIOS_ERR, "EC response has invalid checksum\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int google_chromeec_kbbacklight(int percent)
|
||||
{
|
||||
struct chromeec_command cec_cmd;
|
||||
struct ec_params_pwm_set_keyboard_backlight cmd_backlight;
|
||||
struct ec_response_pwm_get_keyboard_backlight rsp_backlight;
|
||||
/* if they were dumb, help them out */
|
||||
percent = percent % 101;
|
||||
cec_cmd.cmd_code = EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT;
|
||||
cec_cmd.cmd_version = 0;
|
||||
cmd_backlight.percent = percent;
|
||||
cec_cmd.cmd_data_in = &cmd_backlight;
|
||||
cec_cmd.cmd_data_out = &rsp_backlight;
|
||||
cec_cmd.cmd_size_in = sizeof(cmd_backlight);
|
||||
cec_cmd.cmd_size_out = sizeof(rsp_backlight);
|
||||
google_chromeec_command(&cec_cmd);
|
||||
printk(BIOS_DEBUG, "Google Chrome set keyboard backlight: %x status (%x)\n",
|
||||
rsp_backlight.percent, cec_cmd.cmd_code);
|
||||
return cec_cmd.cmd_code;
|
||||
|
||||
}
|
||||
|
||||
void google_chromeec_post(u8 postcode)
|
||||
{
|
||||
/* backlight is a percent. postcode is a u8.
|
||||
* Convert the u8 to %.
|
||||
*/
|
||||
postcode = (postcode/4) + (postcode/8);
|
||||
google_chromeec_kbbacklight(postcode);
|
||||
}
|
||||
|
||||
/*
|
||||
* Query the EC for specified mask indicating enabled events.
|
||||
* The EC maintains separate event masks for SMI, SCI and WAKE.
|
||||
*/
|
||||
static u32 google_chromeec_get_mask(u8 type)
|
||||
{
|
||||
struct ec_params_host_event_mask req;
|
||||
struct ec_response_host_event_mask rsp;
|
||||
struct chromeec_command cmd;
|
||||
|
||||
cmd.cmd_code = type;
|
||||
cmd.cmd_version = 0;
|
||||
cmd.cmd_data_in = &req;
|
||||
cmd.cmd_size_in = sizeof(req);
|
||||
cmd.cmd_data_out = &rsp;
|
||||
cmd.cmd_size_out = sizeof(rsp);
|
||||
|
||||
if (google_chromeec_command(&cmd) == 0)
|
||||
return rsp.mask;
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 google_chromeec_get_events_b(void)
|
||||
{
|
||||
return google_chromeec_get_mask(EC_CMD_HOST_EVENT_GET_B);
|
||||
}
|
||||
|
||||
#ifndef __PRE_RAM__
|
||||
|
||||
static int google_chromeec_set_mask(u8 type, u32 mask)
|
||||
{
|
||||
struct ec_params_host_event_mask req;
|
||||
struct ec_response_host_event_mask rsp;
|
||||
struct chromeec_command cmd;
|
||||
|
||||
req.mask = mask;
|
||||
cmd.cmd_code = type;
|
||||
cmd.cmd_version = 0;
|
||||
cmd.cmd_data_in = &req;
|
||||
cmd.cmd_size_in = sizeof(req);
|
||||
cmd.cmd_data_out = &rsp;
|
||||
cmd.cmd_size_out = sizeof(rsp);
|
||||
|
||||
return google_chromeec_command(&cmd);
|
||||
}
|
||||
|
||||
int google_chromeec_set_sci_mask(u32 mask)
|
||||
{
|
||||
printk(BIOS_DEBUG, "Chrome EC: Set SCI mask to 0x%08x\n", mask);
|
||||
return google_chromeec_set_mask(
|
||||
EC_CMD_HOST_EVENT_SET_SCI_MASK, mask);
|
||||
}
|
||||
|
||||
int google_chromeec_set_smi_mask(u32 mask)
|
||||
{
|
||||
printk(BIOS_DEBUG, "Chrome EC: Set SMI mask to 0x%08x\n", mask);
|
||||
return google_chromeec_set_mask(
|
||||
EC_CMD_HOST_EVENT_SET_SMI_MASK, mask);
|
||||
}
|
||||
|
||||
int google_chromeec_set_wake_mask(u32 mask)
|
||||
{
|
||||
printk(BIOS_DEBUG, "Chrome EC: Set WAKE mask to 0x%08x\n", mask);
|
||||
return google_chromeec_set_mask(
|
||||
EC_CMD_HOST_EVENT_SET_WAKE_MASK, mask);
|
||||
}
|
||||
|
||||
u32 google_chromeec_get_wake_mask(void)
|
||||
{
|
||||
return google_chromeec_get_mask(
|
||||
EC_CMD_HOST_EVENT_GET_WAKE_MASK);
|
||||
}
|
||||
|
||||
#if CONFIG_ELOG
|
||||
/* Find the last port80 code from the previous boot */
|
||||
static u16 google_chromeec_get_port80_last_boot(void)
|
||||
{
|
||||
struct ec_response_port80_last_boot rsp;
|
||||
struct chromeec_command cmd = {
|
||||
.cmd_code = EC_CMD_PORT80_LAST_BOOT,
|
||||
.cmd_data_out = &rsp,
|
||||
.cmd_size_out = sizeof(rsp),
|
||||
};
|
||||
|
||||
/* Get last port80 code */
|
||||
if (google_chromeec_command(&cmd) == 0)
|
||||
return rsp.code;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
void google_chromeec_log_events(u32 mask)
|
||||
{
|
||||
#if CONFIG_ELOG
|
||||
u8 event;
|
||||
u16 code;
|
||||
|
||||
/* Find the last port80 code */
|
||||
code = google_chromeec_get_port80_last_boot();
|
||||
|
||||
/* Log the last post code only if it is abornmal */
|
||||
if (code > 0 && code != POST_OS_BOOT && code != POST_OS_RESUME)
|
||||
printk(BIOS_DEBUG, "Chrome EC: Last POST code was 0x%02x\n",
|
||||
code);
|
||||
|
||||
while ((event = google_chromeec_get_event()) != 0) {
|
||||
if (EC_HOST_EVENT_MASK(event) & mask)
|
||||
elog_add_event_byte(ELOG_TYPE_EC_EVENT, event);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
u8 google_chromeec_get_event(void)
|
||||
{
|
||||
if (google_chromeec_wait_ready(EC_LPC_ADDR_ACPI_CMD)) {
|
||||
printk(BIOS_ERR, "Timeout waiting for EC ready!\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Issue the ACPI query-event command */
|
||||
outb(EC_CMD_ACPI_QUERY_EVENT, EC_LPC_ADDR_ACPI_CMD);
|
||||
|
||||
if (google_chromeec_wait_ready(EC_LPC_ADDR_ACPI_CMD)) {
|
||||
printk(BIOS_ERR, "Timeout waiting for EC QUERY_EVENT!\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Event (or 0 if none) is returned directly in the data byte */
|
||||
return inb(EC_LPC_ADDR_ACPI_DATA);
|
||||
}
|
||||
|
||||
u16 google_chromeec_get_board_version(void)
|
||||
{
|
||||
struct chromeec_command cmd;
|
||||
struct ec_response_board_version board_v;
|
||||
|
||||
cmd.cmd_code = EC_CMD_GET_BOARD_VERSION;
|
||||
cmd.cmd_version = 0;
|
||||
cmd.cmd_size_in = 0;
|
||||
cmd.cmd_size_out = sizeof(board_v);
|
||||
cmd.cmd_data_out = &board_v;
|
||||
|
||||
if (google_chromeec_command(&cmd) != 0)
|
||||
return 0;
|
||||
|
||||
return board_v.board_version;
|
||||
}
|
||||
|
||||
int google_chromeec_set_usb_charge_mode(u8 port_id, enum usb_charge_mode mode)
|
||||
{
|
||||
struct chromeec_command cmd;
|
||||
struct ec_params_usb_charge_set_mode set_mode = {
|
||||
.usb_port_id = port_id,
|
||||
.mode = mode,
|
||||
};
|
||||
|
||||
cmd.cmd_code = EC_CMD_USB_CHARGE_SET_MODE;
|
||||
cmd.cmd_version = 0;
|
||||
cmd.cmd_size_in = sizeof(set_mode);
|
||||
cmd.cmd_data_in = &set_mode;
|
||||
cmd.cmd_size_out = 0;
|
||||
cmd.cmd_data_out = NULL;
|
||||
|
||||
return google_chromeec_command(&cmd);
|
||||
}
|
||||
|
||||
#ifndef __SMM__
|
||||
|
||||
static
|
||||
int google_chromeec_hello(void)
|
||||
{
|
||||
struct chromeec_command cec_cmd;
|
||||
struct ec_params_hello cmd_hello;
|
||||
struct ec_response_hello rsp_hello;
|
||||
cmd_hello.in_data = 0x10203040;
|
||||
cec_cmd.cmd_code = EC_CMD_HELLO;
|
||||
cec_cmd.cmd_version = 0;
|
||||
cec_cmd.cmd_data_in = &cmd_hello.in_data;
|
||||
cec_cmd.cmd_data_out = &rsp_hello.out_data;
|
||||
cec_cmd.cmd_size_in = sizeof(cmd_hello.in_data);
|
||||
cec_cmd.cmd_size_out = sizeof(rsp_hello.out_data);
|
||||
google_chromeec_command(&cec_cmd);
|
||||
printk(BIOS_DEBUG, "Google Chrome EC: Hello got back %x status (%x)\n",
|
||||
rsp_hello.out_data, cec_cmd.cmd_code);
|
||||
return cec_cmd.cmd_code;
|
||||
}
|
||||
|
||||
static int ec_image_type; /* Cached EC image type (ro or rw). */
|
||||
|
||||
static void google_chromeec_init(device_t dev)
|
||||
{
|
||||
struct chromeec_command cec_cmd;
|
||||
struct ec_google_chromeec_config *conf = dev->chip_info;
|
||||
struct ec_response_get_version lpcv_cmd;
|
||||
|
||||
if (!dev->enabled)
|
||||
return;
|
||||
|
||||
printk(BIOS_DEBUG, "Google Chrome EC: Initializing keyboard.\n");
|
||||
pc_keyboard_init(&conf->keyboard);
|
||||
|
||||
google_chromeec_hello();
|
||||
|
||||
memset(&lpcv_cmd, 0, sizeof(lpcv_cmd));
|
||||
cec_cmd.cmd_code = EC_CMD_GET_VERSION;
|
||||
cec_cmd.cmd_version = 0;
|
||||
cec_cmd.cmd_data_out = &lpcv_cmd;
|
||||
cec_cmd.cmd_size_in = 0;
|
||||
cec_cmd.cmd_size_out = sizeof(lpcv_cmd);
|
||||
google_chromeec_command(&cec_cmd);
|
||||
|
||||
if (cec_cmd.cmd_code) {
|
||||
printk(BIOS_DEBUG,
|
||||
"Google Chrome EC: version command failed!\n");
|
||||
} else {
|
||||
printk(BIOS_DEBUG, "Google Chrome EC: version:\n");
|
||||
printk(BIOS_DEBUG, " ro: %s\n", lpcv_cmd.version_string_ro);
|
||||
printk(BIOS_DEBUG, " rw: %s\n", lpcv_cmd.version_string_rw);
|
||||
printk(BIOS_DEBUG, " running image: %d\n",
|
||||
lpcv_cmd.current_image);
|
||||
ec_image_type = lpcv_cmd.current_image;
|
||||
}
|
||||
|
||||
if (cec_cmd.cmd_code ||
|
||||
(recovery_mode_enabled() &&
|
||||
(lpcv_cmd.current_image != EC_IMAGE_RO))) {
|
||||
struct ec_params_reboot_ec reboot_ec;
|
||||
/* Reboot the EC and make it come back in RO mode */
|
||||
reboot_ec.cmd = EC_REBOOT_COLD;
|
||||
reboot_ec.flags = 0;
|
||||
cec_cmd.cmd_code = EC_CMD_REBOOT_EC;
|
||||
cec_cmd.cmd_version = 0;
|
||||
cec_cmd.cmd_data_in = &reboot_ec;
|
||||
cec_cmd.cmd_size_in = sizeof(reboot_ec);
|
||||
cec_cmd.cmd_size_out = 0; /* ignore response, if any */
|
||||
printk(BIOS_DEBUG, "Rebooting with EC in RO mode:\n");
|
||||
google_chromeec_command(&cec_cmd);
|
||||
udelay(1000);
|
||||
hard_reset();
|
||||
hlt();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static void google_chromeec_read_resources(device_t dev)
|
||||
{
|
||||
/* Nothing, but this function avoids an error on serial console. */
|
||||
}
|
||||
|
||||
static void google_chromeec_enable_resources(device_t dev)
|
||||
{
|
||||
/* Nothing, but this function avoids an error on serial console. */
|
||||
}
|
||||
|
||||
static struct device_operations ops = {
|
||||
.init = google_chromeec_init,
|
||||
.read_resources = google_chromeec_read_resources,
|
||||
.enable_resources = google_chromeec_enable_resources
|
||||
};
|
||||
|
||||
static struct pnp_info pnp_dev_info[] = {
|
||||
{ &ops, 0, 0, { 0, 0 }, }
|
||||
};
|
||||
|
||||
static void enable_dev(device_t dev)
|
||||
{
|
||||
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
|
||||
pnp_dev_info);
|
||||
}
|
||||
|
||||
struct chip_operations ec_google_chromeec_ops = {
|
||||
CHIP_NAME("Google Chrome EC")
|
||||
.enable_dev = enable_dev,
|
||||
};
|
||||
|
||||
int google_ec_running_ro(void)
|
||||
{
|
||||
return (ec_image_type == EC_IMAGE_RO);
|
||||
}
|
||||
#endif /* ! __SMM__ */
|
||||
|
||||
#endif /* ! __PRE_RAM__ */
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*
|
||||
* Mailbox EC communication interface for Google Chrome Embedded Controller.
|
||||
*/
|
||||
|
||||
#ifndef _EC_GOOGLE_CHROMEEC_EC_H
|
||||
#define _EC_GOOGLE_CHROMEEC_EC_H
|
||||
|
||||
#ifndef __PRE_RAM__
|
||||
u32 google_chromeec_get_wake_mask(void);
|
||||
int google_chromeec_set_sci_mask(u32 mask);
|
||||
int google_chromeec_set_smi_mask(u32 mask);
|
||||
int google_chromeec_set_wake_mask(u32 mask);
|
||||
u8 google_chromeec_get_event(void);
|
||||
int google_ec_running_ro(void);
|
||||
u16 google_chromeec_get_board_version(void);
|
||||
#endif
|
||||
|
||||
u32 google_chromeec_get_events_b(void);
|
||||
int google_chromeec_kbbacklight(int percent);
|
||||
void google_chromeec_post(u8 postcode);
|
||||
void google_chromeec_log_events(u32 mask);
|
||||
|
||||
enum usb_charge_mode {
|
||||
USB_CHARGE_MODE_DISABLED,
|
||||
USB_CHARGE_MODE_CHARGE_AUTO,
|
||||
USB_CHARGE_MODE_CHARGE_BC12,
|
||||
USB_CHARGE_MODE_DOWNSTREAM_500MA,
|
||||
USB_CHARGE_MODE_DOWNSTREAM_1500MA,
|
||||
};
|
||||
int google_chromeec_set_usb_charge_mode(u8 port_id, enum usb_charge_mode mode);
|
||||
|
||||
#endif /* _EC_GOOGLE_CHROMEEC_EC_H */
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue