google/cyan variants: fix non-functional typo in gpio.c

Typo found/fixed in to-be-merged boards; applying same fix to
already-merged boards.

Change-Id: I15f97467a5442888165399be997b0b690a3c312a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/google/cyan/variants/banon/gpio.c

@@ -72,7 +72,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
 	NATIVE_INT_PU20K(1, L1), /* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	GPIO_NC, /* 85 SDMMC3_1P8_EN */

src/mainboard/google/cyan/variants/celes/gpio.c

@@ -74,7 +74,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPI(trig_edge_both, L1, P_20K_H, non_maskable,
 				en_edge_detect, NA , NA),
 	/* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	Native_M1, /* 85 SDMMC3_1P8_EN */

src/mainboard/google/cyan/variants/cyan/gpio.c

@@ -72,7 +72,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
 	NATIVE_INT(1, L1), /* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	Native_M1, /* 85 SDMMC3_1P8_EN */

src/mainboard/google/cyan/variants/edgar/gpio.c

@@ -72,7 +72,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
 	GPIO_NC, /* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	Native_M1, /* 85 SDMMC3_1P8_EN */

src/mainboard/google/cyan/variants/reks/gpio.c

@@ -72,7 +72,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
 	NATIVE_INT_PU20K(1, L1), /* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	Native_M1, /* 85 SDMMC3_1P8_EN */

src/mainboard/google/cyan/variants/terra/gpio.c

@@ -72,7 +72,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
 	NATIVE_INT_PU20K(1, L1), /* 81  SDMMC3_CD_B */
-	GPIO_NC,  /* 82  spkr	 asummed gpio number */
+	GPIO_NC,  /* 82  spkr	 assumed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */
 	Native_M1, /* 85 SDMMC3_1P8_EN */