Revert "mb/google/dedede: Program VCCIO selection for EN_SPKR GPIO"
This reverts commit ce79ceec86
. This has
introduced a regression in mainboards using JSL SoC such that it
overrides the soft straps for all the GPIOs. This in turn has led to
some of the peripherals not working.
Change-Id: Ifea5d4d0f474873f8bf4818ec1986e534f455216
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56615
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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parent
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@ -9,7 +9,6 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += ec.c
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ramstage-y += board_info.c
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ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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@ -1,17 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <bootstate.h>
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#include <fw_config.h>
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#include <gpio.h>
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static const struct pad_config spkr_pads[] = {
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PAD_CFG_GPO_VCCIOSEL(GPP_D17, 0, PLTRST, 1V8),
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};
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static void fw_config_handle(void *unused)
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{
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if (fw_config_probe(FW_CONFIG(AUDIO_AMP, RT1015P_AUTO))) {
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gpio_configure_pads(spkr_pads, ARRAY_SIZE(spkr_pads));
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}
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
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