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soc/intel/apollolake: configure interrupt trigger mode 

Provide trigger option to configure APIC, sci, smi, nmi interrupts.

Change-Id: I1b553fb4ed1b43aba62346f5b758f8d082606510
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/14353
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Jagadish Krishnamoorthy 2016-03-04 14:00:04 -08:00 committed by Martin Roth
parent 60c64325cc
commit d68a13a602
1 changed files with 8 additions and 8 deletions
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16
src/soc/intel/apollolake/include/soc/gpio.h
View File

@ -53,28 +53,28 @@
PAD_PULL(pull)) PAD_PULL(pull))
/* General purpose input, routed to APIC */ /* General purpose input, routed to APIC */
#define PAD_CFG_GPI_APIC(pad, pull, rst) \ #define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \ _PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
PAD_IRQ_CFG(IOAPIC, LEVEL, NONE), PAD_PULL(pull)) PAD_IRQ_CFG(IOAPIC, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to SMI */ /* General purpose input, routed to SMI */
#define PAD_CFG_GPI_SMI(pad, pull, rst, inv) \ #define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \ _PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
PAD_IRQ_CFG(SMI, LEVEL, inv), PAD_PULL(pull)) PAD_IRQ_CFG(SMI, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to SCI */ /* General purpose input, routed to SCI */
#define PAD_CFG_GPI_SCI(pad, pull, rst, inv) \ #define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \ _PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
PAD_IRQ_CFG(SCI, LEVEL, inv), PAD_PULL(pull)) PAD_IRQ_CFG(SCI, trig, inv), PAD_PULL(pull))
/* General purpose input, routed to NMI */ /* General purpose input, routed to NMI */
#define PAD_CFG_GPI_NMI(pad, pull, rst, inv) \ #define PAD_CFG_GPI_NMI(pad, pull, rst, trig, inv) \
_PAD_CFG_STRUCT(pad, \ _PAD_CFG_STRUCT(pad, \
PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE | \
PAD_IRQ_CFG(NMI, LEVEL, inv), PAD_PULL(pull)) PAD_IRQ_CFG(NMI, trig, inv), PAD_PULL(pull))
struct pad_config { struct pad_config {
uint32_t config0; uint32_t config0;