mb/google/sarien: Add SMBIOS type 9 fields
Fill SMBIOS type 9 fields for both sarien and arcada platform. BUG=b:129485789 TEST=Boot up into OS and check with dmidecode -t 9 to we do have entry. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I47a697131b7aeeb64e0c4b4c0556842f1cb1b02e Reviewed-on: https://review.coreboot.org/c/coreboot/+/32389 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -349,11 +349,15 @@ chip soc/intel/cannonlake
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 off end # PCI Express Port 8
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device pci 1d.0 on end # PCI Express Port 9
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device pci 1d.0 on
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smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
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end # PCI Express Port 9
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device pci 1d.1 on end # PCI Express Port 10
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device pci 1d.2 on end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1d.4 on end # PCI Express Port 13 (x4)
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device pci 1d.4 on
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smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
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end # PCI Express Port 13 (x4)
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device pci 1e.0 off end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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@ -378,11 +378,15 @@ chip soc/intel/cannonlake
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device pci 1c.5 off end # PCI Express Port 6
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device pci 1c.6 off end # PCI Express Port 7
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device pci 1c.7 on end # PCI Express Port 8
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device pci 1d.0 on end # PCI Express Port 9
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device pci 1d.0 on
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smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "2230" "SlotDataBusWidth1X"
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end # PCI Express Port 9
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device pci 1d.1 on end # PCI Express Port 10
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device pci 1d.2 off end # PCI Express Port 11
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device pci 1d.3 off end # PCI Express Port 12
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device pci 1d.4 on end # PCI Express Port 13 (x4)
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device pci 1d.4 on
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smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X"
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end # PCI Express Port 13 (x4)
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device pci 1e.0 off end # UART #0
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device pci 1e.1 off end # UART #1
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device pci 1e.2 off end # GSPI #0
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@ -21,6 +21,7 @@
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#include <intelblocks/chip.h>
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#include <drivers/i2c/designware/dw_i2c.h>
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#include <intelblocks/gspi.h>
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#include <smbios.h>
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#include <stdint.h>
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#include <soc/gpio.h>
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#include <soc/pch.h>
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