From d6c3cd8ca37113e80620603900d9be0d0bbd7813 Mon Sep 17 00:00:00 2001
From: Lijian Zhao <lijian.zhao@intel.com>
Date: Wed, 28 Nov 2018 16:02:55 -0800
Subject: [PATCH] soc/intel/cannonlake: Load FSP teardown optionally

Make build still pass in case of no FsptUpd.h available.

BUG=N/A
TEST=Delete FsptUpd.h and build pass wihtout FSP_CAR set.

Change-Id: I3936d3deb8b079bd4db11e444f6bb7f9605520dc
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/29907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
---
 src/soc/intel/cannonlake/bootblock/bootblock.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c
index 4eeef59e4d..b7d00cd063 100644
--- a/src/soc/intel/cannonlake/bootblock/bootblock.c
+++ b/src/soc/intel/cannonlake/bootblock/bootblock.c
@@ -19,6 +19,8 @@
 #include <soc/bootblock.h>
 #include <soc/iomap.h>
 #include <soc/pch.h>
+
+#if IS_ENABLED(CONFIG_FSP_CAR)
 #include <FsptUpd.h>
 
 const FSPT_UPD temp_ram_init_params = {
@@ -37,6 +39,7 @@ const FSPT_UPD temp_ram_init_params = {
 		.CodeRegionSize = (uint32_t)CONFIG_ROM_SIZE,
 	},
 };
+#endif
 
 asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
 {