diff --git a/src/soc/amd/sabrina/psp_verstage/chipset.c b/src/soc/amd/sabrina/psp_verstage/chipset.c index e82a132830..7f86dbfebf 100644 --- a/src/soc/amd/sabrina/psp_verstage/chipset.c +++ b/src/soc/amd/sabrina/psp_verstage/chipset.c @@ -3,6 +3,7 @@ /* TODO: Check if this is still correct */ #include +#include #include uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) @@ -44,3 +45,13 @@ uint32_t svc_write_postcode(uint32_t postcode) { return 0; } + +void platform_report_mode(int developer_mode_enabled) +{ + printk(BIOS_INFO, "Reporting %s mode\n", + developer_mode_enabled ? "Developer" : "Normal"); + if (developer_mode_enabled) + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_DEVELOPER); + else + svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_NORMAL); +}