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fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to level 

When booting Linux as a coreboot payload, serial access does not work
properly. This is because the setup code erroneously sets IRQ3 and
IRQ4 to level. The UART on Broadwell is 8250/16550 compatible, thus
ISA and edge-triggered.

This change is not necessary on the non-FSP version of Broadwell support.
The non-FSP version does not set these IRQ overrides.

Fix verified booting Linux 4.6.0-rc2 on Intel Camelback Mountain CRB,
using Intel FSP 1.0.

Change-Id: I17b466676e7f4891c3e75ce6208e1580c9eaf742
Signed-off-by: Kevin Paul Herbert <kevin@trippers.org>
Reviewed-on: https://review.coreboot.org/16065
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Kevin Paul Herbert 2016-08-04 14:35:30 -07:00 committed by Patrick Georgi
parent bb003c8126
commit d7127b09ae
1 changed files with 0 additions and 10 deletions
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10
src/soc/intel/fsp_broadwell_de/acpi.c
View File

@ -567,15 +567,5 @@ unsigned long acpi_madt_irq_overrides(unsigned long current)
current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq,
sci_flags);
irqovr = (void *)current;
current += acpi_create_madt_irqoverride(irqovr, 0, 3, 3,
(MP_IRQ_TRIGGER_LEVEL
|MP_IRQ_POLARITY_LOW));
irqovr = (void *)current;
current += acpi_create_madt_irqoverride(irqovr, 0, 4, 4,
(MP_IRQ_TRIGGER_LEVEL
|MP_IRQ_POLARITY_LOW));
return current;
}