AMD: Use same sourcecode for reset in romstage as ramstage

Confusingly, romstage compiled in different copy of soft_reset()
than ramstage. Use source in reset.c for both.

Change-Id: I2e4b6d1b89c859c7cf5d9e9c8f7748b43d369775
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3487
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

src/mainboard/advansus/a785e-i/Makefile.inc

@@ -1,5 +1,4 @@
-#romstage-y += reset.c #FIXME romstage have include test_rest.c
+romstage-y += reset.c
-
 ramstage-y += reset.c
 
 #SB800 CIMx share AGESA V5 lib code

src/mainboard/advansus/a785e-i/romstage.c

@@ -72,14 +72,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
-
 #include <reset.h>
-void soft_reset(void)
-{
-	set_bios_reset();
-	/* link reset */
-	outb(0x06, 0x0cf9);
-}
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {

src/mainboard/asus/m5a88-v/Makefile.inc

@@ -1,3 +1,4 @@
+romstage-y += reset.c
 ramstage-y += reset.c
 
 #SB800 CIMx share AGESA V5 lib code

src/mainboard/asus/m5a88-v/romstage.c

@@ -72,14 +72,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
-
 #include <reset.h>
-void soft_reset(void)
-{
-	set_bios_reset();
-	/* link reset */
-	outb(0x06, 0x0cf9);
-}
 
 #define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

src/mainboard/avalue/eax-785e/Makefile.inc

@@ -1,5 +1,4 @@
-#romstage-y += reset.c #FIXME romstage have include test_rest.c
+romstage-y += reset.c
-
 ramstage-y += reset.c
 
 #SB800 CIMx share AGESA V5 lib code

src/mainboard/avalue/eax-785e/romstage.c

@@ -72,15 +72,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
-
 #include <reset.h>
-void soft_reset(void)
-{
-	set_bios_reset();
-	/* link reset */
-	outb(0x06, 0x0cf9);
-}
-
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {