mb/google/guybrush/var/nipperkin: update thermal setting

Enable STT and decrease sustained_power_limit_mW to 12W

BUG=b:219616787
BRANCH=guybrush
TEST=emerge-guybrush coreboot
     update the thermal setting value by measurement and
     pass the thermal performance test

Signed-off-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Change-Id: I5b7b0156fb4a1e2be8528a5787ed82acff93f06c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
This commit is contained in:
Kevin Chiu 2022-02-15 16:09:40 +08:00 committed by Felix Held
parent a4af1b58a5
commit d736fd4ea7
1 changed files with 23 additions and 1 deletions

View File

@ -204,7 +204,7 @@ chip soc/amd/cezanne
register "fast_ppt_limit_mW" = "30000" register "fast_ppt_limit_mW" = "30000"
register "slow_ppt_time_constant_s" = "5" register "slow_ppt_time_constant_s" = "5"
register "stapm_time_constant_s" = "275" register "stapm_time_constant_s" = "275"
register "sustained_power_limit_mW" = "15000" register "sustained_power_limit_mW" = "12000"
register "thermctl_limit_degreeC" = "100" register "thermctl_limit_degreeC" = "100"
register "telemetry_vddcrvddfull_scale_current_mA" = "73331" #mA register "telemetry_vddcrvddfull_scale_current_mA" = "73331" #mA
@ -212,6 +212,28 @@ chip soc/amd/cezanne
register "telemetry_vddcrsocfull_scale_current_mA" = "31955" #mA register "telemetry_vddcrsocfull_scale_current_mA" = "31955" #mA
register "telemetry_vddcrsocoffset" = "852" register "telemetry_vddcrsocoffset" = "852"
# Enable STT support
register "stt_control" = "1"
register "stt_pcb_sensor_count" = "2"
register "stt_min_limit" = "12000"
register "stt_m1" = "0x466"
register "stt_m2" = "0xFF3B"
register "stt_m3" = "0"
register "stt_m4" = "0"
register "stt_m5" = "0"
register "stt_m6" = "0"
register "stt_c_apu" = "0x14DA"
register "stt_c_gpu" = "0"
register "stt_c_hs2" = "0"
register "stt_alpha_apu" = "0x199A"
register "stt_alpha_gpu" = "0"
register "stt_alpha_hs2" = "0"
register "stt_skin_temp_apu" = "0x2E00"
register "stt_skin_temp_gpu" = "0"
register "stt_skin_temp_hs2" = "0"
register "stt_error_coeff" = "0x21"
register "stt_error_rate_coefficient" = "0x2666"
# I2C Config # I2C Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |