superio/smsc/lpc47n207: Hook into build system
Provide proper Makefile and Kconfig components so that this superio is built as object code. Select superio component in mainboard Kconfig's to bring in the link-time symbols and thereby removing the need for .c inclusion. N.B. The LPC47N207 Super I/O does not physically exist on these boards. The Super I/O is found on external LPC debug card hardware and so should really be made selectable. However, this is beyond the scope of this specific fix, that rids us of .c inclusions in romstage.c Change-Id: I451c3a81c4b5beca1ed65e27467a7393d2521dae Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8084 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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@ -13,6 +13,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SUPERIO_SMSC_MEC1308
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# LPC47N207 selected for external LPC card
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# not on board, should be made selectable.
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select SUPERIO_SMSC_LPC47N207
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select DRIVERS_GENERIC_IOAPIC
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select INTEL_INT15
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select HAVE_MRC
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@ -45,7 +45,6 @@
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#include "gpio.h"
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#if CONFIG_DRIVERS_UART_8250IO
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#include <superio/smsc/lpc47n207/lpc47n207.h>
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#include "superio/smsc/lpc47n207/early_serial.c"
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#endif
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#if CONFIG_CHROMEOS
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#include <vendorcode/google/chromeos/chromeos.h>
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@ -11,6 +11,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select NORTHBRIDGE_INTEL_SANDYBRIDGE
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select SOUTHBRIDGE_INTEL_BD82X6X
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select SUPERIO_ITE_IT8772F
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# LPC47N207 selected for external LPC card
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# not on board, should be made selectable.
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select SUPERIO_SMSC_LPC47N207
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select HAVE_MRC
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select INTEL_INT15
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@ -45,7 +45,6 @@
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#include "gpio.h"
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#if CONFIG_DRIVERS_UART_8250IO
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#include <superio/smsc/lpc47n207/lpc47n207.h>
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#include "superio/smsc/lpc47n207/early_serial.c"
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#endif
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#if CONFIG_CHROMEOS
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#include <vendorcode/google/chromeos/chromeos.h>
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@ -30,6 +30,8 @@ config SUPERIO_SMSC_LPC47M10X
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bool
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config SUPERIO_SMSC_LPC47M15X
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bool
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config SUPERIO_SMSC_LPC47N207
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bool
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config SUPERIO_SMSC_LPC47N217
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bool
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config SUPERIO_SMSC_LPC47N227
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@ -24,6 +24,7 @@ subdirs-y += lpc47b272
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subdirs-y += lpc47b397
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subdirs-y += lpc47m10x
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subdirs-y += lpc47m15x
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subdirs-y += lpc47n207
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subdirs-y += lpc47n217
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subdirs-y += lpc47n227
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subdirs-y += sio10n268
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@ -0,0 +1,21 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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romstage-$(CONFIG_SUPERIO_SMSC_LPC47N207) += early_serial.c
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@ -17,6 +17,12 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include "lpc47n207.h"
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/*
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* This code tries to discover the SMSC LPC47N207 superio chip which can be
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* connected over an LPC dongle. The chip could be bootstrap mapped to one of
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@ -17,9 +17,12 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_SMSC_LPC47N207_LPC47N207_H
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#define SUPERIO_SMSC_LPC47N207_LPC47N207_H
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#ifndef SUPERIO_SMSC_LPC47N207_H
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#define SUPERIO_SMSC_LPC47N207_H
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extern void try_enabling_LPC47N207_uart(void);
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#include <arch/io.h>
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#include <stdint.h>
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#endif
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void try_enabling_LPC47N207_uart(void);
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#endif /* SUPERIO_SMSC_LPC47N207_H */
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