superio/smsc/lpc47n207: Hook into build system

Provide proper Makefile and Kconfig components so
that this superio is built as object code. Select
superio component in mainboard Kconfig's to bring
in the link-time symbols and thereby removing the
need for .c inclusion.

N.B. The LPC47N207 Super I/O does not physically exist
on these boards. The Super I/O is found on external LPC
debug card hardware and so should really be made selectable.
However, this is beyond the scope of this specific fix, that
rids us of .c inclusions in romstage.c

Change-Id: I451c3a81c4b5beca1ed65e27467a7393d2521dae
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8084
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Edward O'Callaghan 2015-01-04 17:21:52 +11:00
parent 3a6550d989
commit d76ac6349d
9 changed files with 43 additions and 6 deletions

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@ -13,6 +13,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_SMSC_MEC1308
# LPC47N207 selected for external LPC card
# not on board, should be made selectable.
select SUPERIO_SMSC_LPC47N207
select DRIVERS_GENERIC_IOAPIC
select INTEL_INT15
select HAVE_MRC

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@ -45,7 +45,6 @@
#include "gpio.h"
#if CONFIG_DRIVERS_UART_8250IO
#include <superio/smsc/lpc47n207/lpc47n207.h>
#include "superio/smsc/lpc47n207/early_serial.c"
#endif
#if CONFIG_CHROMEOS
#include <vendorcode/google/chromeos/chromeos.h>

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@ -11,6 +11,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select NORTHBRIDGE_INTEL_SANDYBRIDGE
select SOUTHBRIDGE_INTEL_BD82X6X
select SUPERIO_ITE_IT8772F
# LPC47N207 selected for external LPC card
# not on board, should be made selectable.
select SUPERIO_SMSC_LPC47N207
select HAVE_MRC
select INTEL_INT15

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@ -45,7 +45,6 @@
#include "gpio.h"
#if CONFIG_DRIVERS_UART_8250IO
#include <superio/smsc/lpc47n207/lpc47n207.h>
#include "superio/smsc/lpc47n207/early_serial.c"
#endif
#if CONFIG_CHROMEOS
#include <vendorcode/google/chromeos/chromeos.h>

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@ -30,6 +30,8 @@ config SUPERIO_SMSC_LPC47M10X
bool
config SUPERIO_SMSC_LPC47M15X
bool
config SUPERIO_SMSC_LPC47N207
bool
config SUPERIO_SMSC_LPC47N217
bool
config SUPERIO_SMSC_LPC47N227

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@ -24,6 +24,7 @@ subdirs-y += lpc47b272
subdirs-y += lpc47b397
subdirs-y += lpc47m10x
subdirs-y += lpc47m15x
subdirs-y += lpc47n207
subdirs-y += lpc47n217
subdirs-y += lpc47n227
subdirs-y += sio10n268

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@ -0,0 +1,21 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
romstage-$(CONFIG_SUPERIO_SMSC_LPC47N207) += early_serial.c

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@ -17,6 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include <stdlib.h>
#include "lpc47n207.h"
/*
* This code tries to discover the SMSC LPC47N207 superio chip which can be
* connected over an LPC dongle. The chip could be bootstrap mapped to one of

View File

@ -17,9 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_SMSC_LPC47N207_LPC47N207_H
#define SUPERIO_SMSC_LPC47N207_LPC47N207_H
#ifndef SUPERIO_SMSC_LPC47N207_H
#define SUPERIO_SMSC_LPC47N207_H
extern void try_enabling_LPC47N207_uart(void);
#include <arch/io.h>
#include <stdint.h>
#endif
void try_enabling_LPC47N207_uart(void);
#endif /* SUPERIO_SMSC_LPC47N207_H */