mb/system76/rpl: Add Serval WS 13 as a variant

The Serval Workstation 13 (serw13) is a Raptor Lake-HX board.

Tested with a custom TianoCore UefiPayloadPkg.

Working:

- PS/2 Keyboard
- I2C HID touchpad
- Both DIMM slots with 5200 MT/s memory
- Both M.2 SSD slots
- All USB ports
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone + mic audio output
- 3.5mm microphone input
- S3 suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 6.2.7

Not working:

- Discrete/Hybrid graphics
- Thunderbolt

Change-Id: Id709a7d06854ba9de673d5e3f25c0a1bbcc53d21
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73440
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Crawford 2023-07-06 14:16:23 -06:00 committed by Felix Held
parent ff865a329f
commit d7a07c2873
12 changed files with 809 additions and 0 deletions

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@ -227,6 +227,7 @@ The boards in this section are not real mainboards, but emulators.
- [Oryx Pro 9](system76/oryp9.md) - [Oryx Pro 9](system76/oryp9.md)
- [Oryx Pro 10](system76/oryp10.md) - [Oryx Pro 10](system76/oryp10.md)
- [Oryx Pro 11](system76/oryp11.md) - [Oryx Pro 11](system76/oryp11.md)
- [Serval Workstation 13](system76/serw13.md)
## Texas Instruments ## Texas Instruments

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@ -0,0 +1,69 @@
# System76 Serval Workstation 13 (serw13)
## Specs
- CPU
- Intel Core i9-13900HX
- Chipset
- Intel HM770
- EC
- ITE IT5570E running [System76 EC](https://github.com/system76/ec)
- Graphics
- dGPU options:
- NVIDIA GeForce RTX 4060
- NVIDIA GeForce RTX 4070
- eDP options:
- 15.6" 1920x1080@165Hz LCD (BOE NV156FHM-NY8)
- 17.6" 3840x2160@144Hz LCD (AUO B173ZAN03.0)
- 1x HDMI 2.1
- 1x Mini DisplayPort 1.4
- 1x DisplayPort 1.4 over USB-C
- Memory
- Up to 64GB (2x32GB) dual-channel DDR5 SO-DIMMs @ 5200 Mhz
- Networking
- Realtek RTL8125BG-CG 2.5G Ethernet
- M.2 NVMe/CNVi WiFi/Bluetooth (Intel Wi-Fi 6 AX210/211)
- Power
- 280W (20V, 14A) AC adapter (Chicony A18-280P1A)
- 80Wh 6-cell Lithium-ion battery ()
- Sound
- Realtek ALC1220 codec
- Realtek ALC1318 smart amp
- Internal speakers and microphone
- Combined 3.5mm headphone & microphone jack
- Combined 3.5mm microphone & S/PDIF jack
- HDMI, mDP, USB-C DP audio
- Storage
- 2x M.2 PCIe NVMe Gen 4 SSDs
- MicroSD card reader (Realtek RTS5227S)
- USB
- 1x USB Type-C with Thunderbolt 4
- 1x USB 3.2 Gen 2 Type-C
- 2x USB 3.2 Gen 1 Type-A
- Dimensions
- 15": 2.49cm x 35.8cm x 24.0cm, 2.4kg
- 17": 2.49cm x 39.6cm x 26.2cm, 2.8kg
## Flashing coreboot
```eval_rst
+---------------------+---------------------+
| Type | Value |
+=====================+=====================+
| Socketed flash | no |
+---------------------+---------------------+
| Vendor | GigaDevice |
+---------------------+---------------------+
| Model | GD25B256E |
+---------------------+---------------------+
| Size | 32 MiB |
+---------------------+---------------------+
| Package | WSON-8 |
+---------------------+---------------------+
| Internal flashing | yes |
+---------------------+---------------------+
| External flashing | yes |
+---------------------+---------------------+
```
The flash chip (U46) is left of the memory slots.

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@ -43,6 +43,12 @@ config BOARD_SYSTEM76_ORYP11
select SOC_INTEL_ALDERLAKE_PCH_P select SOC_INTEL_ALDERLAKE_PCH_P
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
config BOARD_SYSTEM76_SERW13
select BOARD_SYSTEM76_RPL_COMMON
select EC_SYSTEM76_EC_DGPU
select PCIEXP_HOTPLUG
select SOC_INTEL_ALDERLAKE_PCH_S
if BOARD_SYSTEM76_RPL_COMMON if BOARD_SYSTEM76_RPL_COMMON
config MAINBOARD_DIR config MAINBOARD_DIR
@ -52,6 +58,7 @@ config VARIANT_DIR
default "addw3" if BOARD_SYSTEM76_ADDW3 default "addw3" if BOARD_SYSTEM76_ADDW3
default "gaze18" if BOARD_SYSTEM76_GAZE18 default "gaze18" if BOARD_SYSTEM76_GAZE18
default "oryp11" if BOARD_SYSTEM76_ORYP11 default "oryp11" if BOARD_SYSTEM76_ORYP11
default "serw13" if BOARD_SYSTEM76_SERW13
config OVERRIDE_DEVICETREE config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
@ -60,16 +67,19 @@ config MAINBOARD_PART_NUMBER
default "addw3" if BOARD_SYSTEM76_ADDW3 default "addw3" if BOARD_SYSTEM76_ADDW3
default "gaze18" if BOARD_SYSTEM76_GAZE18 default "gaze18" if BOARD_SYSTEM76_GAZE18
default "oryp11" if BOARD_SYSTEM76_ORYP11 default "oryp11" if BOARD_SYSTEM76_ORYP11
default "serw13" if BOARD_SYSTEM76_SERW13
config MAINBOARD_SMBIOS_PRODUCT_NAME config MAINBOARD_SMBIOS_PRODUCT_NAME
default "Adder WS" if BOARD_SYSTEM76_ADDW3 default "Adder WS" if BOARD_SYSTEM76_ADDW3
default "Gazelle" if BOARD_SYSTEM76_GAZE18 default "Gazelle" if BOARD_SYSTEM76_GAZE18
default "Oryx Pro" if BOARD_SYSTEM76_ORYP11 default "Oryx Pro" if BOARD_SYSTEM76_ORYP11
default "Serval WS" if BOARD_SYSTEM76_SERW13
config MAINBOARD_VERSION config MAINBOARD_VERSION
default "addw3" if BOARD_SYSTEM76_ADDW3 default "addw3" if BOARD_SYSTEM76_ADDW3
default "gaze18" if BOARD_SYSTEM76_GAZE18 default "gaze18" if BOARD_SYSTEM76_GAZE18
default "oryp11" if BOARD_SYSTEM76_ORYP11 default "oryp11" if BOARD_SYSTEM76_ORYP11
default "serw13" if BOARD_SYSTEM76_SERW13
config CONSOLE_POST config CONSOLE_POST
default y default y

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@ -6,3 +6,6 @@ config BOARD_SYSTEM76_GAZE18
config BOARD_SYSTEM76_ORYP11 config BOARD_SYSTEM76_ORYP11
bool "oryp11" bool "oryp11"
config BOARD_SYSTEM76_SERW13
bool "serw13"

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@ -0,0 +1,12 @@
FLASH 32M {
SI_DESC 4K
SI_ME 3944K
SI_BIOS@16M 16M {
RW_MRC_CACHE 64K
SMMSTORE(PRESERVE) 256K
WP_RO {
FMAP 4K
COREBOOT(CBFS)
}
}
}

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@ -0,0 +1,2 @@
Board name: serw13
Release year: 2023

Binary file not shown.

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@ -0,0 +1,294 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <mainboard/gpio.h>
#include <soc/gpio.h>
static const struct pad_config gpio_table[] = {
/* ------- GPIO Group GPD ------- */
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // BATLOW_N
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
PAD_NC(GPD2, NONE),
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWR_BTN#
PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
PAD_NC(GPD6, NONE),
PAD_CFG_GPO(GPD7, 0, DEEP), // GPD_7 (Strap)
PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // CNVI_SUSCLK
PAD_CFG_GPO(GPD9, 0, PWROK), // SLP_WLAN#
PAD_NC(GPD10, NONE),
PAD_NC(GPD11, NONE),
PAD_NC(GPD12, NONE),
/* ------- GPIO Group GPP_A ------- */
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0_EC
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1_EC
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2_EC
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3_EC
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS_EC#
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1), // ESPI_CLK_EC
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), // ESPI_RESET#
PAD_NC(GPP_A7, NONE),
PAD_NC(GPP_A8, NONE),
PAD_NC(GPP_A9, NONE),
PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1), // ESPI_ALRT0#
PAD_CFG_GPI(GPP_A11, UP_20K, DEEP), // GPIO4_GC6_NVVDD_EN_R
PAD_NC(GPP_A12, NONE),
PAD_NC(GPP_A13, NONE),
PAD_NC(GPP_A14, NONE),
/* ------- GPIO Group GPP_B ------- */
_PAD_CFG_STRUCT(GPP_B0, 0x40100100, 0x3000), // TPM_PIRQ#
PAD_NC(GPP_B1, NONE),
PAD_CFG_GPI(GPP_B2, NONE, DEEP), // CNVI_WAKE#
PAD_CFG_GPO(GPP_B3, 1, PLTRST), // PCH_BT_EN
PAD_NC(GPP_B4, NONE),
PAD_NC(GPP_B5, NONE),
PAD_NC(GPP_B6, NONE),
PAD_NC(GPP_B7, NONE),
PAD_NC(GPP_B8, NONE),
PAD_NC(GPP_B9, NONE),
PAD_NC(GPP_B10, NONE),
PAD_NC(GPP_B11, NONE),
PAD_NC(GPP_B12, NONE),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), // HDA_SPKR
PAD_NC(GPP_B15, NONE),
PAD_NC(GPP_B16, NONE),
PAD_NC(GPP_B17, NONE),
PAD_CFG_NF(GPP_B18, NONE, RSMRST, NF1), // GPP_B18_PMCALERT#
PAD_NC(GPP_B19, NONE),
PAD_CFG_GPO(GPP_B20, 0, DEEP), // GPIO_LANRTD3
_PAD_CFG_STRUCT(GPP_B21, 0x42880100, 0x0000), // GPP_B21_TBT_WAKE#
PAD_CFG_GPO(GPP_B22, 0, DEEP), // LAN_EC_RST#
PAD_CFG_GPI(GPP_B23, NONE, DEEP), // Crystal frequency strap
/* ------- GPIO Group GPP_C ------- */
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DATA
PAD_NC(GPP_C2, NONE), // PCH_PORT80_LED (TLS confidentiality strap)
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF3), // GPPB_I2C2_SDA (Pantone)
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF3), // GPPB_I2C2_SCL (Pantone)
PAD_NC(GPP_C5, NONE), // eSPI disable strap
PAD_CFG_GPI(GPP_C6, NONE, DEEP), // I2C3_SDA (PD controller)
PAD_CFG_GPI(GPP_C7, NONE, DEEP), // I2C3_SCL (PD controller)
PAD_CFG_GPI(GPP_C8, NONE, DEEP), // TPM_DET
PAD_NC(GPP_C9, NONE),
PAD_NC(GPP_C10, NONE),
PAD_NC(GPP_C11, NONE),
PAD_NC(GPP_C12, NONE),
PAD_NC(GPP_C13, NONE),
PAD_NC(GPP_C14, NONE),
PAD_NC(GPP_C15, NONE),
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), // I2C_SDA_TP
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // I2C_SCL_TP
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), // PCH_I2C_SDA
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), // PCH_I2C_SCL
// GPP_C20 (UART2_RX) configured in bootblock
// GPP_C21 (UART2_TX) configured in bootblock
PAD_NC(GPP_C22, NONE),
PAD_NC(GPP_C23, NONE),
/* ------- GPIO Group GPP_D ------- */
PAD_NC(GPP_D0, NONE),
PAD_NC(GPP_D1, NONE),
PAD_NC(GPP_D2, NONE),
PAD_CFG_GPO(GPP_D3, 0, DEEP), // GFX_DETECT_STRAP
PAD_NC(GPP_D4, NONE),
PAD_CFG_GPO(GPP_D5, 1, DEEP), // M.2_BT_PCMFRM_CRF_RST_N
// GPP_D6 (M.2_BT_PCMOUT_CLKREQ0) configured by FSP
PAD_NC(GPP_D7, NONE), // M.2_BT_PCMIN
PAD_NC(GPP_D8, NONE), // M.2_BT_PCMCLK
PAD_NC(GPP_D9, NONE),
PAD_NC(GPP_D10, NONE),
PAD_NC(GPP_D11, NONE),
// GPP_D12 (SSD_CLKREQ#) configured by FSP
PAD_NC(GPP_D13, NONE),
PAD_NC(GPP_D14, NONE),
PAD_NC(GPP_D15, NONE),
PAD_NC(GPP_D16, NONE),
PAD_NC(GPP_D17, NONE),
PAD_NC(GPP_D18, NONE),
PAD_NC(GPP_D19, NONE),
PAD_NC(GPP_D20, NONE),
PAD_NC(GPP_D21, NONE),
PAD_NC(GPP_D22, NONE),
PAD_NC(GPP_D23, NONE),
/* ------- GPIO Group GPP_E ------- */
PAD_NC(GPP_E0, NONE),
PAD_NC(GPP_E1, NONE),
PAD_CFG_GPI(GPP_E2, NONE, DEEP), // SWI#
PAD_CFG_GPI(GPP_E3, NONE, DEEP), // SMI#
PAD_NC(GPP_E4, NONE),
PAD_NC(GPP_E5, NONE),
PAD_NC(GPP_E6, NONE),
PAD_CFG_GPI_INT(GPP_E7, NONE, PLTRST, LEVEL), // TP_ATTN#
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), // SATA_LED#
PAD_CFG_GPI(GPP_E9, NONE, DEEP), // USB_OC0#
PAD_CFG_GPI(GPP_E10, NONE, DEEP), // USB_OC1#
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // USB_OC2#
PAD_CFG_GPI(GPP_E12, NONE, DEEP), // USB_OC3#
PAD_NC(GPP_E13, NONE),
PAD_NC(GPP_E14, NONE),
PAD_CFG_GPO(GPP_E15, 0, DEEP), // ROM_I2C_EN
PAD_NC(GPP_E16, NONE),
PAD_CFG_GPI(GPP_E17, NONE, DEEP), // SB_KBCRST#
PAD_CFG_GPO(GPP_E18, 1, DEEP), // SB_BLON
PAD_NC(GPP_E19, NONE),
PAD_NC(GPP_E20, NONE),
PAD_NC(GPP_E21, NONE),
/* ------- GPIO Group GPP_F ------- */
PAD_CFG_NF(GPP_F0, UP_20K, DEEP, NF1), // M.2_SSD_SATA_DET_N
PAD_NC(GPP_F1, NONE),
PAD_CFG_GPO(GPP_F2, 1, DEEP), // GPP_F2_TBT_RST#
PAD_NC(GPP_F3, NONE),
PAD_NC(GPP_F4, NONE),
PAD_NC(GPP_F5, NONE), // SSD_SATA_DEVSLP
PAD_NC(GPP_F6, NONE),
PAD_CFG_GPI(GPP_F7, NONE, DEEP), // INTP_8851
PAD_CFG_GPI(GPP_F8, NONE, PLTRST), // GC6_FB_EN_PCH
// GPP_F9 (DGPU_PWR_EN) configured in bootblock
PAD_CFG_GPI(GPP_F10, NONE, DEEP), // Recovery strap
PAD_NC(GPP_F11, NONE),
PAD_NC(GPP_F12, NONE),
PAD_NC(GPP_F13, NONE),
PAD_NC(GPP_F14, NONE),
PAD_CFG_GPI(GPP_F15, NONE, DEEP), // K_SKTOCC_N
PAD_NC(GPP_F16, NONE),
PAD_NC(GPP_F17, NONE),
PAD_CFG_GPO(GPP_F18, 0, DEEP), // CCD_WP#
PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), // NV_ENAVDD
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1), // BLON
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), // EDP_BRIGHTNESS
PAD_NC(GPP_F22, NONE),
PAD_NC(GPP_F23, NONE),
/* ------- GPIO Group GPP_G ------- */
PAD_NC(GPP_G0, NONE),
PAD_NC(GPP_G1, NONE),
PAD_NC(GPP_G2, NONE),
PAD_CFG_GPI(GPP_G3, NONE, DEEP), // MB det (MB1/MB2)
PAD_CFG_GPI(GPP_G4, NONE, DEEP), // MB det (15"/17")
PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), // SLP_DRAM_N
PAD_CFG_GPI(GPP_G6, NONE, DEEP), // MB det (G-SYNC)
PAD_CFG_GPI(GPP_G7, NONE, DEEP), // MB det (Pantone)
/* ------- GPIO Group GPP_H ------- */
PAD_CFG_GPI(GPP_H0, NONE, DEEP), // VAL_SV_ADVANCE_STRAP
PAD_NC(GPP_H1, NONE),
PAD_CFG_GPI(GPP_H2, NONE, DEEP), // WLAN_GPIO_WAKE_N
// GPP_H3 (NC) configured by FSP
// GPP_H4 (SSD_SATA_CLKREQ#) configured by FSP
// GPP_H5 (WLAN_CLKREQ#) configured by FSP
// GPP_H6 (CARD_CLKREQ#) configured by FSP
// GPP_H7 (GLAN_CLKREQ#) configured by FSP
// GPP_H8 (PEG_CLKREQ#) configured by FSP
// GPP_H9 (TBT_CLKREQ#) configured by FSP
PAD_NC(GPP_H10, NONE),
PAD_NC(GPP_H11, NONE),
PAD_NC(GPP_H12, NONE), // eSPI flash sharing mode strap
PAD_NC(GPP_H13, NONE),
PAD_NC(GPP_H14, NONE),
PAD_NC(GPP_H15, NONE), // JTAG ODT disable strap
PAD_NC(GPP_H16, NONE),
PAD_NC(GPP_H17, NONE),
PAD_NC(GPP_H18, NONE), // 1.8V VCCPSPI strap
PAD_NC(GPP_H19, NONE),
PAD_NC(GPP_H20, NONE),
PAD_NC(GPP_H21, NONE),
PAD_NC(GPP_H22, NONE),
PAD_NC(GPP_H23, NONE),
/* ------- GPIO Group GPP_I ------- */
_PAD_CFG_STRUCT(GPP_I0, 0x86880100, 0x0000), // DP_F_HPD
PAD_CFG_NF(GPP_I1, NONE, DEEP, NF1), // CPU_DP_B_HPD
_PAD_CFG_STRUCT(GPP_I2, 0x86880100, 0x0000), // HDMI_HPD
PAD_CFG_NF(GPP_I3, NONE, DEEP, NF1), // CPU_DP_D_HPD
_PAD_CFG_STRUCT(GPP_I4, 0x86880100, 0x0000), // G_DP_DHPD_E
PAD_CFG_GPO(GPP_I5, 0, DEEP), // GPIO_TBT_RESET
PAD_NC(GPP_I6, NONE),
PAD_NC(GPP_I7, NONE),
PAD_NC(GPP_I8, NONE),
PAD_NC(GPP_I9, NONE),
PAD_NC(GPP_I10, NONE),
PAD_CFG_GPI(GPP_I11, NONE, DEEP), // USB_OC4#
PAD_CFG_GPI(GPP_I12, NONE, DEEP), // USB_OC5#
PAD_CFG_GPI(GPP_I13, NONE, DEEP), // USB_OC6#
PAD_CFG_GPI(GPP_I14, NONE, DEEP), // USB_OC7#
PAD_NC(GPP_I15, NONE),
PAD_NC(GPP_I16, NONE),
PAD_NC(GPP_I17, NONE),
PAD_NC(GPP_I18, NONE), // NO REBOOT strap
PAD_NC(GPP_I19, NONE),
PAD_NC(GPP_I20, NONE),
PAD_NC(GPP_I21, NONE),
PAD_NC(GPP_I22, NONE), // BOOT BIOS strap
/* ------- GPIO Group GPP_J ------- */
PAD_CFG_NF(GPP_J0, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
PAD_CFG_NF(GPP_J1, NONE, DEEP, NF1), // CPU_C10_GATE_N
PAD_CFG_NF(GPP_J2, NONE, DEEP, NF1), // CNVI_BRI_DT_R
PAD_CFG_NF(GPP_J3, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
PAD_CFG_NF(GPP_J4, NONE, DEEP, NF1), // CNVI_RGI_DT_R
PAD_CFG_NF(GPP_J5, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
PAD_CFG_NF(GPP_J6, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
PAD_CFG_NF(GPP_J7, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
PAD_CFG_GPI(GPP_J8, NONE, DEEP), // VAL_TEST_SETUP_MENU
PAD_NC(GPP_J9, NONE),
PAD_NC(GPP_J10, NONE),
PAD_NC(GPP_J11, NONE),
/* ------- GPIO Group GPP_K ------- */
_PAD_CFG_STRUCT(GPP_K0, 0x42800100, 0x0000), // TBCIO_PLUG_EVENT#
PAD_NC(GPP_K1, NONE),
PAD_NC(GPP_K2, NONE),
PAD_CFG_GPO(GPP_K3, 1, PLTRST), // TBT_RTD3_PWR_EN_R
PAD_CFG_GPO(GPP_K4, 0, RSMRST), // TBT_FORCE_PWR_R
PAD_NC(GPP_K5, NONE),
// GPP_K6 doesn't exist
// GPP_K7 doesn't exist
PAD_CFG_NF(GPP_K8, NONE, DEEP, NF1), // VCCIN_AUX_VID0
PAD_CFG_NF(GPP_K9, NONE, DEEP, NF1), // VCCIN_AUX_VID1
// GPP_K10 doesn't exist
PAD_NC(GPP_K11, NONE),
/* ------- GPIO Group GPP_R ------- */
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT / ME_WE
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#_R
PAD_NC(GPP_R5, NONE),
PAD_NC(GPP_R6, NONE),
PAD_NC(GPP_R7, NONE),
PAD_CFG_GPI(GPP_R8, NONE, DEEP), // DGPU_PWRGD_R
PAD_CFG_NF(GPP_R9, NONE, DEEP, NF1), // EDP_HPD
PAD_NC(GPP_R10, NONE),
PAD_NC(GPP_R11, NONE),
PAD_NC(GPP_R12, NONE),
PAD_NC(GPP_R13, NONE),
PAD_NC(GPP_R14, NONE),
PAD_NC(GPP_R15, NONE),
// GPP_R16 (DGPU_RST#_PCH) configured in bootblock
PAD_NC(GPP_R17, NONE),
PAD_NC(GPP_R18, NONE),
PAD_CFG_GPI(GPP_R19, NONE, DEEP), // SCI#
PAD_NC(GPP_R20, NONE),
PAD_NC(GPP_R21, NONE),
/* ------- GPIO Group GPP_S ------- */
PAD_NC(GPP_S0, NONE),
PAD_NC(GPP_S1, NONE),
PAD_NC(GPP_S2, NONE),
PAD_NC(GPP_S3, NONE),
PAD_NC(GPP_S4, NONE), // GPPS_DMIC_CLK
PAD_NC(GPP_S5, NONE), // GPPS_DMIC_DATA
PAD_NC(GPP_S6, NONE),
PAD_NC(GPP_S7, NONE),
};
void mainboard_configure_gpios(void)
{
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
}

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <mainboard/gpio.h>
#include <soc/gpio.h>
static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPO(GPP_F9, 0, DEEP), // DGPU_PWR_EN
PAD_CFG_GPO(GPP_R16, 0, DEEP), // DGPU_RST#_PCH
PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), // UART2_RX
PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), // UART2_TX
};
void mainboard_configure_early_gpios(void)
{
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}

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/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
/* Realtek, ALC1220 */
0x10ec1220, /* Vendor ID */
0x1558d502, /* Subsystem ID */
241,
0x02050008, 0x020480cb, 0x02050008, 0x0204c0cb,
AZALIA_SUBVENDOR(0, 0x1558d502),
AZALIA_RESET(1),
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
AZALIA_PIN_CFG(0, 0x15, 0x40000000),
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
// ALC1318 smart amp
0x02050016, 0x02048020, 0x02050016, 0x02048020,
0x02050043, 0x02043005, 0x02050058, 0x02048ed1,
0x02050063, 0x0204e430, 0x05b50000, 0x05b43530,
0x05750002, 0x05741400, 0x05b5000a, 0x05b45520,
0x02050042, 0x020486cb, 0x0143b000, 0x01470700,
0x02050036, 0x02042a6a, 0x02050008, 0x0204800b,
0x02050007, 0x020403c3, 0x01470c02, 0x01470c02,
0x00c37180, 0x01b3b000, 0x01b70700, 0x00b37419,
0x0205001b, 0x02044002, 0x0205001b, 0x02044002,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c000, 0x0205002b, 0x02040001,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f20d,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f212, 0x0205002b, 0x0204003e,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c001,
0x0205002b, 0x02040002, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c003, 0x0205002b, 0x02040022,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c004,
0x0205002b, 0x02040044, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c005, 0x0205002b, 0x02040044,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c007,
0x0205002b, 0x02040064, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c00e, 0x0205002b, 0x020400e7,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f223,
0x0205002b, 0x0204007f, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f224, 0x0205002b, 0x020400db,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f225,
0x0205002b, 0x020400ee, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f226, 0x0205002b, 0x0204003f,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f227,
0x0205002b, 0x0204000f, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f21a, 0x0205002b, 0x02040078,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f242,
0x0205002b, 0x0204003c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c120, 0x0205002b, 0x02040040,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c125,
0x0205002b, 0x02040003, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c321, 0x0205002b, 0x0204000b,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c200,
0x0205002b, 0x020400d8, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c201, 0x0205002b, 0x02040027,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c202,
0x0205002b, 0x0204000f, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c400, 0x0205002b, 0x0204000e,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c401,
0x0205002b, 0x02040043, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c402, 0x0205002b, 0x020400e0,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c403,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c404, 0x0205002b, 0x0204004c,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c406,
0x0205002b, 0x02040040, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c407, 0x0205002b, 0x02040002,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c408,
0x0205002b, 0x0204003f, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c300, 0x0205002b, 0x02040001,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c125,
0x0205002b, 0x02040003, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204df00, 0x0205002b, 0x02040010,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204df5f,
0x0205002b, 0x02040001, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204df60, 0x0205002b, 0x020400a7,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204ea00,
0x0205002b, 0x02040047, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c203, 0x0205002b, 0x02040004,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c206,
0x0205002b, 0x02040078, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f102, 0x0205002b, 0x02040000,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f103,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f104, 0x0205002b, 0x020400f4,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f105,
0x0205002b, 0x02040003, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f109, 0x0205002b, 0x020400e0,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10a,
0x0205002b, 0x0204000b, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10b, 0x0205002b, 0x0204004c,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10b,
0x0205002b, 0x0204005c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f102, 0x0205002b, 0x02040000,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f103,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f104, 0x0205002b, 0x020400f4,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f105,
0x0205002b, 0x02040004, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f109, 0x0205002b, 0x02040065,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10a,
0x0205002b, 0x0204000b, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10b, 0x0205002b, 0x0204004c,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10b,
0x0205002b, 0x0204005c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204e706, 0x0205002b, 0x0204000f,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204e707,
0x0205002b, 0x02040030, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204e806, 0x0205002b, 0x0204000f,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204e807,
0x0205002b, 0x02040030, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204ce04, 0x0205002b, 0x02040002,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204ce05,
0x0205002b, 0x02040087, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204ce06, 0x0205002b, 0x020400a2,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204ce07,
0x0205002b, 0x0204006c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204cf04, 0x0205002b, 0x02040002,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204cf05,
0x0205002b, 0x02040087, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204cf06, 0x0205002b, 0x020400a2,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204cf07,
0x0205002b, 0x0204006c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204ce60, 0x0205002b, 0x020400e3,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204c130,
0x0205002b, 0x02040051, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204e000, 0x0205002b, 0x020400a8,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f102,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f103, 0x0205002b, 0x02040000,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f104,
0x0205002b, 0x020400f5, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f105, 0x0205002b, 0x02040023,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f109,
0x0205002b, 0x02040004, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10a, 0x0205002b, 0x0204000b,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10b,
0x0205002b, 0x0204004c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10b, 0x0205002b, 0x0204005c,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02044100, 0x02050029, 0x02041888,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204c121, 0x0205002b, 0x0204000b,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f102,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f103, 0x0205002b, 0x02040000,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f104,
0x0205002b, 0x020400f5, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f105, 0x0205002b, 0x02040023,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f109,
0x0205002b, 0x02040000, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10a, 0x0205002b, 0x0204000b,
0x0205002c, 0x0204b423, 0x02050027, 0x02040010,
0x02050028, 0x02040000, 0x02050029, 0x0204f10b,
0x0205002b, 0x0204004c, 0x0205002c, 0x0204b423,
0x02050027, 0x02040010, 0x02050028, 0x02040000,
0x02050029, 0x0204f10b, 0x0205002b, 0x0204005c,
0x0205002c, 0x0204b423,
// XXX: Duplicate last 2 u32s to keep in 4-dword blocks
0x0205002c, 0x0204b423,
};
const u32 pc_beep_verbs[] = {};
AZALIA_ARRAY_SIZES;

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chip soc/intel/alderlake
# Support 5200 MT/s memory
register "max_dram_speed_mts" = "5200"
device domain 0 on
subsystemid 0x1558 0xd502 inherit
device ref xhci on
# USB2
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3)
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2)
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger)
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera
register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # TBT USB2.0
register "usb2_ports[13]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
# USB3
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC2 (USB 3.1 Gen2 + DP 1.4 HBR3)
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB1 (USB 3.2 Gen2)
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # AJ_USB2 (USB 3.2 Gen2 + charger)
end
device ref i2c0 on
# Touchpad I2C bus
register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci"
chip drivers/i2c/hid
register "generic.hid" = ""ELAN0412""
register "generic.desc" = ""ELAN Touchpad""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""FTCS1000""
register "generic.desc" = ""FocalTech Touchpad""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E7)"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 38 on end
end
end
device ref pcie5_0 on
# CPU PCIe RP#2 x8, Clock 14 (DGPU)
register "cpu_pcie_rp[CPU_RP(2)]" = "{
.clk_src = 14,
.clk_req = 14,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end
device ref pcie_rp3 on
# PCH RP#3 x1, Clock 13 (GLAN)
register "pch_pcie_rp[PCH_RP(3)]" = "{
.clk_src = 13,
.clk_req = 13,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
device pci 00.0 on end
end
device ref pcie_rp5 on
# PCH RP#5 x1, Clock 12 (CARD)
register "pch_pcie_rp[PCH_RP(5)]" = "{
.clk_src = 12,
.clk_req = 12,
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_HOTPLUG,
}"
end
device ref pcie_rp8 on
# PCH RP#8 x1, Clock 11 (WLAN)
register "pch_pcie_rp[PCH_RP(8)]" = "{
.clk_src = 11,
.clk_req = 11,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end
device ref pcie_rp13 on
# PCH RP#13 x4, Clock 10 (SSD1)
register "pch_pcie_rp[PCH_RP(13)]" = "{
.clk_src = 10,
.clk_req = 10,
.flags = PCIE_RP_LTR, // XXX: AER spews warnings
}"
end
device ref pcie_rp21 on
# PCH RP#21 x4, Clock 5 (SSD2)
register "pch_pcie_rp[PCH_RP(21)]" = "{
.clk_src = 5,
.clk_req = 5,
.flags = PCIE_RP_LTR, // XXX: AER spews warnings
}"
end
device ref pcie_rp25 on
# PCH RP#25 x4, Clock 15 (TBT)
register "pch_pcie_rp[PCH_RP(25)]" = "{
.clk_src = 15,
.clk_req = 15,
.flags = PCIE_RP_LTR | PCIE_RP_HOTPLUG, // XXX: AER causes UnsupReq warnings
}"
end
end
end

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@ -0,0 +1,32 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/meminit.h>
#include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
const struct mb_cfg board_cfg = {
.type = MEM_TYPE_DDR5,
.ect = true,
.LpDdrDqDqsReTraining = 1,
.ddr_config = {
.dq_pins_interleaved = true,
},
};
const struct mem_spd spd_info = {
.topo = MEM_TOPO_DIMM_MODULE,
.smbus = {
[0] = { .addr_dimm[0] = 0x50, },
[1] = { .addr_dimm[0] = 0x52, },
},
};
const bool half_populated = false;
// Set primary display to internal graphics
mupd->FspmConfig.PrimaryDisplay = 0;
mupd->FspmConfig.DmiMaxLinkSpeed = 4;
mupd->FspmConfig.GpioOverride = 0;
memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
}