From d7a6d61d51ebf4025484e567a20b2b50fda5a6f9 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Fri, 24 Apr 2020 10:24:04 -0700 Subject: [PATCH] device/pci_id: Add Tiger Lake TCSS device ID Add Tiger Lake TCSS USB xHCI, xDCI and Thunderbolt DMA device ID. BUG=None TEST=Built and booted image sucessfully. Change-Id: Idef3850666c9f393181e0a13974b9ad79ba258ad Signed-off-by: John Zhao Reviewed-on: https://review.coreboot.org/c/coreboot/+/40693 Tested-by: build bot (Jenkins) Reviewed-by: Caveh Jalali Reviewed-by: Nick Vaccaro --- src/include/device/pci_ids.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index cfdcab350c..4b17567a30 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3559,6 +3559,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_XHCI 0x02ed #define PCI_DEVICE_ID_INTEL_CMP_H_XHCI 0x06ed #define PCI_DEVICE_ID_INTEL_TGP_LP_XHCI 0xa0ed +#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI 0x9a13 #define PCI_DEVICE_ID_INTEL_MCC_XHCI 0x4b7d #define PCI_DEVICE_ID_INTEL_JSP_XHCI 0x4ded @@ -3644,6 +3645,7 @@ #define PCI_DEVICE_ID_INTEL_CMP_LP_XDCI 0x02ee #define PCI_DEVICE_ID_INTEL_CMP_H_XDCI 0x06ee #define PCI_DEVICE_ID_INTEL_TGP_LP_XDCI 0xa0ee +#define PCI_DEVICE_ID_INTEL_TGP_TCSS_XDCI 0x9a15 #define PCI_DEVICE_ID_INTEL_MCC_XDCI 0x4b7e #define PCI_DEVICE_ID_INTEL_JSP_XDCI 0x4dee @@ -3669,6 +3671,8 @@ #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27 #define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA0 0x9a1b +#define PCI_DEVICE_ID_INTEL_TGL_TBT_DMA1 0x9a1d /* Intel WIFI Ids */ #define PCI_DEVICE_ID_1000_SERIES_WIFI 0x0084