soc/amd/stoneyridge/northbridge: reserve PCI config IO ports

This makes sure that the resource allocator won't use those ports for
anything else.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I014ffe3ee94ec153e91113f9a17e89f24ca040b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75619
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2023-06-05 15:30:10 +02:00
parent d0959dc800
commit d7ad1409b9

View file

@ -334,6 +334,8 @@ void domain_read_resources(struct device *dev)
pci_domain_read_resources(dev);
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 -> 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);