From d7cdeee74d2f0b701c614e1e7e7a177eecede55a Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Fri, 1 Apr 2022 23:51:30 +0530 Subject: [PATCH] soc/intel/alderlake: Remove ALDERLAKE_A0_CONFIG_PMC_DESCRIPTOR Kconfig The patch removes Kconfig CONFIG_ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR code which updates PMC descriptor for an intermediate ADL-P SoC stepping A0. Since intermediate ADL-P SoC is no longer supported and no board is selecting the Kconfig, so remove the code that updates PMC descriptor. TEST=Build and boot Gimble board Signed-off-by: Sridhar Siricilla Change-Id: I2a629353a4194a7505655346dcab4ef53059e0b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63339 Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/Kconfig | 9 -- src/soc/intel/alderlake/Makefile.inc | 1 - src/soc/intel/alderlake/bootblock/bootblock.c | 3 - .../alderlake/bootblock/pmc_descriptor.c | 88 ------------------- .../intel/alderlake/include/soc/bootblock.h | 2 - 5 files changed, 103 deletions(-) delete mode 100644 src/soc/intel/alderlake/bootblock/pmc_descriptor.c diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 6b0a27a47b..b2f90f891a 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -112,15 +112,6 @@ config CPU_SPECIFIC_OPTIONS select UDK_202005_BINDING select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM -config ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR - bool - help - Alder Lake stepping A0 needs a different value for a PMC setting in - the IFD. When this option is selected, coreboot will update the IFD - value at runtime, which allows using an IFD with the new value with - any CPU stepping. To apply this workaround, the IFD region needs to - be writable by the host. - config ALDERLAKE_CAR_ENHANCED_NEM bool default y if !INTEL_CAR_NEM diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 16784aab48..b3235cd45a 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -16,7 +16,6 @@ bootblock-y += bootblock/report_platform.c bootblock-y += espi.c bootblock-y += gpio.c bootblock-y += p2sb.c -bootblock-$(CONFIG_ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR) += bootblock/pmc_descriptor.c romstage-y += espi.c romstage-y += gpio.c diff --git a/src/soc/intel/alderlake/bootblock/bootblock.c b/src/soc/intel/alderlake/bootblock/bootblock.c index e209ae24d7..b8086a42ab 100644 --- a/src/soc/intel/alderlake/bootblock/bootblock.c +++ b/src/soc/intel/alderlake/bootblock/bootblock.c @@ -25,9 +25,6 @@ void bootblock_soc_early_init(void) void bootblock_soc_init(void) { - if (CONFIG(ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR)) - configure_pmc_descriptor(); - report_platform_info(); bootblock_pch_init(); diff --git a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c b/src/soc/intel/alderlake/bootblock/pmc_descriptor.c deleted file mode 100644 index 14a9dcb90e..0000000000 --- a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c +++ /dev/null @@ -1,88 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define PMC_DESC_7_BYTE3 0xc32 - -/* Flash Master 1 : HOST/BIOS */ -#define FLMSTR1 0x80 - -/* Flash signature Offset */ -#define FLASH_SIGN_OFFSET 0x10 -#define FLMSTR_WR_SHIFT_V2 20 -#define FLASH_VAL_SIGN 0xFF0A55A - -/* It checks whether host(Flash Master 1) has write access to the Descriptor Region or not */ -static int is_descriptor_writeable(uint8_t *desc) -{ - /* Check flash has valid signature */ - if (read32((void *)(desc + FLASH_SIGN_OFFSET)) != FLASH_VAL_SIGN) { - printk(BIOS_DEBUG, "Flash Descriptor is not valid\n"); - return 0; - } - - /* Check host has write access to the Descriptor Region */ - if (!((read32((void *)(desc + FLMSTR1)) >> FLMSTR_WR_SHIFT_V2) & BIT(0))) { - printk(BIOS_DEBUG, "Host doesn't have write access to Descriptor Region\n"); - return 0; - } - - return 1; -} - -/* It updates PMC Descriptor in the Descriptor Region */ -void configure_pmc_descriptor(void) -{ - uint8_t si_desc_buf[CONFIG_SI_DESC_REGION_SZ]; - struct region_device desc_rdev; - - if (cpu_get_cpuid() != CPUID_ALDERLAKE_J0) - return; - - if (fmap_locate_area_as_rdev_rw(CONFIG_SI_DESC_REGION, &desc_rdev) < 0) { - printk(BIOS_ERR, "Failed to locate %s in the FMAP\n", CONFIG_SI_DESC_REGION); - return; - } - - if (rdev_readat(&desc_rdev, si_desc_buf, 0, CONFIG_SI_DESC_REGION_SZ) != - CONFIG_SI_DESC_REGION_SZ) { - printk(BIOS_ERR, "Failed to read Descriptor Region from SPI Flash\n"); - return; - } - - if (!is_descriptor_writeable(si_desc_buf)) - return; - - if (si_desc_buf[PMC_DESC_7_BYTE3] != 0x40) { - printk(BIOS_DEBUG, "Update of PMC Descriptor is not required!\n"); - return; - } - - si_desc_buf[PMC_DESC_7_BYTE3] = 0x44; - - if (rdev_eraseat(&desc_rdev, 0, CONFIG_SI_DESC_REGION_SZ) != CONFIG_SI_DESC_REGION_SZ) { - printk(BIOS_ERR, "Failed to erase Descriptor Region area\n"); - return; - } - - if (rdev_writeat(&desc_rdev, si_desc_buf, 0, CONFIG_SI_DESC_REGION_SZ) - != CONFIG_SI_DESC_REGION_SZ) { - printk(BIOS_ERR, "Failed to update Descriptor Region\n"); - return; - } - - printk(BIOS_DEBUG, "Update of PMC Descriptor successful, trigger GLOBAL RESET\n"); - - pmc_global_reset_enable(true); - do_full_reset(); - die("Failed to trigger GLOBAL RESET\n"); -} diff --git a/src/soc/intel/alderlake/include/soc/bootblock.h b/src/soc/intel/alderlake/include/soc/bootblock.h index e989bdd865..ce2e42e6b2 100644 --- a/src/soc/intel/alderlake/include/soc/bootblock.h +++ b/src/soc/intel/alderlake/include/soc/bootblock.h @@ -17,6 +17,4 @@ void bootblock_pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void); -void configure_pmc_descriptor(void); - #endif