sb/intel/bd82x6x: Add awareness of ME's Alt Disable Mode
me_cleaner now allows setting a bit in the PCH straps - AltMeDisable tells the ME to stop execution after BUP - disabling the 30 minute watchdog - but also "breaking" the ME. The ME reports opmode = 2. This means the ME will not respond when we wait for an acknowledgement about the DRAM being ready. The current code waits 5 seconds for a response, that in this case, never comes. If the ME is reporting opmode 2, don't delay or wait for a response from the ME. Tested on my X220, this patch fixed the five seconds before the payload executed. Verified using the timestamp patch. Change-Id: Ifdda6b2dbb8ae3a650be6d5df6c60475a3fa74aa Signed-off-by: Nathaniel Roach <nroach44@gmail.com> Reviewed-on: https://review.coreboot.org/21466 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -191,18 +191,26 @@ int intel_early_me_init_done(u8 status)
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meDID = did.uma_base | (1 << 28);// | (1 << 23);
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pci_write_config32(PCI_DEV(0, 0x16, 0), PCI_ME_H_GS, meDID);
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timestamp_add_now(TS_ME_INFORM_DRAM_WAIT);
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udelay(1100);
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/* Must wait for ME acknowledgement */
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millisec = 0;
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hfs = (pci_read_config32(PCI_DEV(0, 0x16, 0), PCI_ME_HFS) & 0xfe000000) >> 24;
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while ((((hfs & 0xf0) >> 4) != ME_HFS_BIOS_DRAM_ACK) && (millisec < 5000)) {
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udelay(1000);
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hfs = (pci_read_config32(PCI_DEV(0, 0x16, 0), PCI_ME_HFS) & 0xfe000000) >> 24;
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millisec++;
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if (opmode == ME_HFS_MODE_DEBUG) {
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printk(BIOS_NOTICE,
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"ME: ME is reporting as disabled, "
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"so not waiting for a response.\n");
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} else {
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timestamp_add_now(TS_ME_INFORM_DRAM_WAIT);
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udelay(100);
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millisec = 0;
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do {
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udelay(1000);
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hfs = (pci_read_config32(
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PCI_DEV(0, 0x16, 0), PCI_ME_HFS) & 0xfe000000)
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>> 24;
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millisec++;
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} while ((((hfs & 0xf0) >> 4) != ME_HFS_BIOS_DRAM_ACK)
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&& (millisec <= 5000));
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timestamp_add_now(TS_ME_INFORM_DRAM_DONE);
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}
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timestamp_add_now(TS_ME_INFORM_DRAM_DONE);
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me_fws2 = pci_read_config32(PCI_DEV(0, 0x16, 0), 0x48);
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printk(BIOS_NOTICE, "ME: FWS2: 0x%x\n", me_fws2);
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@ -43,7 +43,7 @@ static const char *me_opstate_values[] = {
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/* HFS[19:16] Current Operation Mode Values */
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static const char *me_opmode_values[] = {
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[ME_HFS_MODE_NORMAL] = "Normal",
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[ME_HFS_MODE_DEBUG] = "Debug",
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[ME_HFS_MODE_DEBUG] = "Debug or Disabled by AltDisableBit",
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[ME_HFS_MODE_DIS] = "Soft Temporary Disable",
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[ME_HFS_MODE_OVER_JMPR] = "Security Override via Jumper",
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[ME_HFS_MODE_OVER_MEI] = "Security Override via MEI Message"
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