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mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5 

These boards need a working VTD therefore enable this feature.

Change-Id: I74c64bf1bd66188c4c32b85c66683dafd0e1fd38
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/31195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
This commit is contained in:
Werner Zeh 2019-02-01 12:39:40 +01:00
parent 279afdc24b
commit d7e5f4b7c5
2 changed files with 6 additions and 0 deletions
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3
src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
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@ -47,6 +47,9 @@ chip soc/intel/apollolake
# 0:HS400(Default), 1:HS200, 2:DDR50 # 0:HS400(Default), 1:HS200, 2:DDR50
register "emmc_host_max_speed" = "2" register "emmc_host_max_speed" = "2"
# Enable Vtd feature
register "enable_vtd" = "1"
device domain 0 on device domain 0 on
device pci 00.0 on end # - Host Bridge device pci 00.0 on end # - Host Bridge
device pci 00.1 off end # - DPTF device pci 00.1 off end # - DPTF

3
src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
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@ -46,6 +46,9 @@ chip soc/intel/apollolake
# 0:HS400(Default), 1:HS200, 2:DDR50 # 0:HS400(Default), 1:HS200, 2:DDR50
register "emmc_host_max_speed" = "2" register "emmc_host_max_speed" = "2"
# Enable Vtd feature
register "enable_vtd" = "1"
# Intel Common SoC Config # Intel Common SoC Config
#+-------------------+---------------------------+ #+-------------------+---------------------------+
#| Field | Value | #| Field | Value |