zork: update gumboz variant

gumboz is the dalboz/dirinboz follower.
update gumboz variant to align dirinboz settings.

BUG=b:174277853,b:173662179
BRANCH=zork
TEST=emerge-zork coreboot

Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: I80c03d531761c02b68bd127d889c3ace2dd9e99e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
This commit is contained in:
Kevin Chiu 2020-12-15 17:01:16 +08:00 committed by Hung-Te Lin
parent ccceb2250e
commit d800d5e3ac
9 changed files with 149 additions and 13 deletions

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@ -1,3 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-or-later
subdirs-y += ./spd
ramstage-y += gpio.c
ramstage-y += variant.c

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@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <boardid.h>
#include <gpio.h>
#include <soc/gpio.h>
static const struct soc_amd_gpio dirinboz_gpio_set_stage_ram[] = {
/* PEN_DETECT_ODL - no used */
PAD_NC(GPIO_4),
/* PEN_POWER_EN - no used */
PAD_NC(GPIO_5),
};
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
{
*size = ARRAY_SIZE(dirinboz_gpio_set_stage_ram);
return dirinboz_gpio_set_stage_ram;
}

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@ -1,3 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/audio.asl>

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@ -1,3 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/mainboard.asl>

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@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0-or-later
chip soc/amd/picasso
# Start : OPN Performance Configuration
@ -16,27 +15,74 @@ chip soc/amd/picasso
register "stapm_time_constant_s" = "2500"
register "sustained_power_limit_mW" = "4800"
register "telemetry_vddcr_vdd_slope_mA" = "42465"
register "telemetry_vddcr_vdd_offset" = "69"
register "telemetry_vddcr_soc_slope_mA" = "42667"
register "telemetry_vddcr_soc_offset" = "167"
# End : OPN Performance Configuration
# I2C2 for touchscreen and trackpad
register "i2c[2]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 18, /* 0 to 2.31 (3.3 * .7) */
.fall_time_ns = 57, /* 2.31 to 0 */
}"
# I2C3 for H1
register "i2c[3]" = "{
.speed = I2C_SPEED_FAST,
.rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */
.fall_time_ns = 42, /* 1.26v to 0 */
.early_init = true,
}"
register "emmc_config" = "{
.timing = SD_EMMC_EMMC_HS400,
.sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A,
.init_khz_preset = 400,
}"
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit
end # domain
device mmio 0xfedc4000 on # APU_I2C2_BASE
end # device
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_9)"
register "wake" = "GEVENT_22"
register "probed" = "1"
device i2c 15 on end
end
chip drivers/i2c/generic
register "hid" = ""ELAN0001""
register "desc" = ""ELAN Touchscreen""
register "probed" = "1"
register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_32)"
register "enable_delay_ms" = "1"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"
register "reset_delay_ms" = "20"
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "stop_off_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/hid
register "generic.hid" = ""GTCH7503""
register "generic.desc" = ""G2TOUCH Touchscreen""
register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_12)"
register "generic.probed" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_32)"
register "generic.enable_delay_ms" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"
register "generic.reset_delay_ms" = "50"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
end
end # chip soc/amd/picasso

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@ -1,5 +1,15 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
SPD_SOURCES = ddr4-spd-empty.hex
SPD_SOURCES =
SPD_SOURCES += ddr4-spd-9.hex # ID = 0(0b0000) Parts = H5ANAG6NCJR-XNC
SPD_SOURCES += ddr4-spd-empty.hex # ID = 1(0b0001)
SPD_SOURCES += ddr4-spd-3.hex # ID = 2(0b0010) Parts = K4A8G165WC-BCTD
SPD_SOURCES += ddr4-spd-empty.hex # ID = 3(0b0011)
SPD_SOURCES += ddr4-spd-1.hex # ID = 4(0b0100) Parts = K4A8G165WC-BCWE
SPD_SOURCES += ddr4-spd-1.hex # ID = 5(0b0101) Parts = H5AN8G6NDJR-XNC
SPD_SOURCES += ddr4-spd-2.hex # ID = 6(0b0110) Parts = H5ANAG6NCMR-XNC
SPD_SOURCES += ddr4-spd-1.hex # ID = 7(0b0111) Parts = MT40A512M16TB-062E:J
SPD_SOURCES += ddr4-spd-7.hex # ID = 8(0b1000) Parts = MT40A1G16KD-062E:E
SPD_SOURCES += ddr4-spd-8.hex # ID = 9(0b1001) Parts = K4AAG165WA-BCTD
SPD_SOURCES += ddr4-spd-7.hex # ID = 10(0b1010) Parts = K4AAG165WA-BCWE

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@ -1 +1,10 @@
DRAM Part Name ID to assign
K4A8G165WC-BCTD 2 (0010)
K4A8G165WC-BCWE 4 (0100)
H5AN8G6NDJR-XNC 5 (0101)
H5ANAG6NCMR-XNC 6 (0110)
MT40A512M16TB-062E:J 7 (0111)
MT40A1G16KD-062E:E 8 (1000)
K4AAG165WA-BCTD 9 (1001)
K4AAG165WA-BCWE 10 (1010)
H5ANAG6NCJR-XNC 0 (0000)

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@ -7,3 +7,13 @@
# See util/spd_tools/ddr4/README.md for more details and instructions.
# Part Name, Fixed ID (optional)
# Gumboz shares the same DRAM IDs as Dirinboz since two variants use the same PCB.
K4A8G165WC-BCTD, 2
K4A8G165WC-BCWE, 4
H5AN8G6NDJR-XNC, 5
H5ANAG6NCMR-XNC, 6
MT40A512M16TB-062E:J, 7
MT40A1G16KD-062E:E, 8
K4AAG165WA-BCTD, 9
K4AAG165WA-BCWE, 10
H5ANAG6NCJR-XNC

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@ -0,0 +1,44 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/device.h>
#include <drivers/i2c/generic/chip.h>
#include <soc/pci_devs.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/i2c_tunnel/chip.h>
#include <string.h>
/* FIXME: Comments seem to suggest these are not entirely correct. */
static const fsp_ddi_descriptor non_hdmi_ddi_descriptors[] = {
{
// DDI0, DP0, eDP
.connector_type = EDP,
.aux_index = AUX1,
.hdp_index = HDP1
},
{
// DDI1, DP1, DB OPT2 USB-C1 / DB OPT3 MST hub
.connector_type = DP,
.aux_index = AUX2,
.hdp_index = HDP2
},
{
// DP2 pins not connected on Dali
// DDI2, DP3, USB-C0
.connector_type = DP,
.aux_index = AUX4,
.hdp_index = HDP4,
}
};
void variant_get_dxio_ddi_descriptors(const fsp_dxio_descriptor **dxio_descs,
size_t *dxio_num,
const fsp_ddi_descriptor **ddi_descs,
size_t *ddi_num)
{
*dxio_descs = baseboard_get_dxio_descriptors(dxio_num);
*ddi_descs = &non_hdmi_ddi_descriptors[0];
*ddi_num = ARRAY_SIZE(non_hdmi_ddi_descriptors);
}