cpu/x86/lapic,pae,tsc/Makefile: use all_x86 target
Use the newly introduced 'all_x86' make target to add the compilation unit to all stages that run on the x86 cores, but not to verstage on PSP. TEST=Timeless build for Mandolin results in identical image. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I181c3207bb1ebe9c5080ef3a3cdda8146ed05822 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74152 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -4,14 +4,6 @@ bootblock-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
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romstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
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ramstage-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
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postcar-$(CONFIG_UDELAY_LAPIC) += apic_timer.c
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bootblock-y += boot_cpu.c
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verstage_x86-y += boot_cpu.c
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romstage-y += boot_cpu.c
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ramstage-y += boot_cpu.c
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postcar-y += boot_cpu.c
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bootblock-y += lapic.c
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verstage_x86-y += lapic.c
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romstage-y += lapic.c
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ramstage-y += lapic.c
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postcar-y += lapic.c
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all_x86-y += boot_cpu.c
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all_x86-y += lapic.c
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@ -1,6 +1,2 @@
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bootblock-y += pgtbl.c
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verstage_x86-y += pgtbl.c
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romstage-y += pgtbl.c
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postcar-y += pgtbl.c
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ramstage-y += pgtbl.c
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all_x86-y += pgtbl.c
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smm-y += pgtbl.c
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@ -1,6 +1,2 @@
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bootblock-y += delay_tsc.c
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ramstage-y += delay_tsc.c
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romstage-y += delay_tsc.c
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verstage_x86-y += delay_tsc.c
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postcar-y += delay_tsc.c
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all_x86-y += delay_tsc.c
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smm-y += delay_tsc.c
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