From d80884ea5a73faa475ac58977e4829439d43dab3 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 29 Oct 2018 13:35:04 -0600 Subject: [PATCH] mb/google/kahlee: Disable IOMMU Unfortunately Stoney has an issue where enabling the IOMMU causes a 10%-50% decrease in the integrated graphics performance. It is also disabled by default on other stoney platforms. BUG=b:118612241 TEST=Verify that IOMMU is disabled. Change-Id: Ia396c7227cb21461ec8afbdf746721d4fb28083d Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/29342 Reviewed-by: Raul Rangel Reviewed-by: Daniel Kurtz Tested-by: build bot (Jenkins) --- src/mainboard/google/kahlee/variants/aleena/devicetree.cb | 2 +- src/mainboard/google/kahlee/variants/careena/devicetree.cb | 2 +- src/mainboard/google/kahlee/variants/delan/devicetree.cb | 2 +- src/mainboard/google/kahlee/variants/grunt/devicetree.cb | 2 +- src/mainboard/google/kahlee/variants/liara/devicetree.cb | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb index 5438e6dd41..27a8e28cd5 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb @@ -58,7 +58,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU + device pci 0.2 off end # IOMMU (Disabled for performance and battery) device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index b541c0305e..23253b2ca9 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -61,7 +61,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU + device pci 0.2 off end # IOMMU (Disabled for performance and battery) device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge diff --git a/src/mainboard/google/kahlee/variants/delan/devicetree.cb b/src/mainboard/google/kahlee/variants/delan/devicetree.cb index 0dfe204bfa..fd30d5df84 100644 --- a/src/mainboard/google/kahlee/variants/delan/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/delan/devicetree.cb @@ -55,7 +55,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU + device pci 0.2 off end # IOMMU (Disabled for performance and battery) device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index 5a8906b3b1..b37e1bf0ac 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -61,7 +61,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU + device pci 0.2 off end # IOMMU (Disabled for performance and battery) device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/devicetree.cb index cea3425aff..343fbeb4dc 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/devicetree.cb @@ -58,7 +58,7 @@ chip soc/amd/stoneyridge end device domain 0 on device pci 0.0 on end # Root Complex - device pci 0.2 on end # IOMMU + device pci 0.2 off end # IOMMU device pci 1.0 on end # Internal Graphics P2P bridge 0x98e4 device pci 1.1 on end # Internal Multimedia device pci 2.0 on end # PCIe Host Bridge