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amd/mendocino/acpi/soc: Add DPTC Support 

Add support for DPTC by calling SB.DPTC() as part of PNOT().

BRANCH=none
BUG=b:217911928
TEST=Boot skyrim

Signed-off-by: Tim Van Patten <timvp@google.com>
Change-Id: Ifc332bfc4d273031c93b77673224b4f3c2871fb1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67694
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Van Patten 2022-09-15 17:21:38 -06:00 committed by Martin L Roth
parent 7a6451bd3e
commit d8210d6ee1
1 changed files with 7 additions and 0 deletions
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7
src/soc/amd/mendocino/acpi/soc.asl
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@ -35,6 +35,9 @@ Scope(\_SB) {
#include "rtc_workaround.asl" #include "rtc_workaround.asl"
/* Enable DPTC interface with AMD ALIB */
External(\_SB.DPTC, MethodObj)
/* /*
* Platform Notify * Platform Notify
* *
@ -44,4 +47,8 @@ Method (PNOT)
{ {
/* Report AC/DC state to ALIB using WAL1() */ /* Report AC/DC state to ALIB using WAL1() */
\WAL1 () \WAL1 ()
If (CondRefOf (\_SB.DPTC)) {
\_SB.DPTC()
}
} }