inteltool: Add dumping of full PCR ports
SoCs from Skylake on have many settings as so called private con- figuration registers (PCRs). These are organized as 256 ports with a 64KiB space each. We use the Primary to Sideband (P2SB) bridge's BAR to access them. Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19593 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -24,6 +24,7 @@
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <errno.h>
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#include "inteltool.h"
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#include "pcr.h"
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@ -31,6 +32,12 @@
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#include <machine/sysarch.h>
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#endif
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#define MAX_PCR_PORTS 8 /* how often may `--pcr` be specified */
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enum long_only_opts {
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LONG_OPT_PCR = 0x100,
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};
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/*
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* http://pci-ids.ucw.cz/read/PC/8086
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* http://en.wikipedia.org/wiki/Intel_Tick-Tock
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@ -369,7 +376,9 @@ void print_usage(const char *name)
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" -A | --ambs: dump AMB registers\n"
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" -x | --sgx: dump SGX status\n"
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" -a | --all: dump all known (safe) registers\n"
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"\n");
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" --pcr=PORT_ID: dump all registers of a PCR port\n"
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" (may be specified max %d times)\n"
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"\n", MAX_PCR_PORTS);
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exit(1);
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}
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@ -388,6 +397,8 @@ int main(int argc, char *argv[])
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int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0;
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int dump_spi = 0, dump_gfx = 0, dump_ahci = 0, dump_sgx = 0;
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int show_gpio_diffs = 0;
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size_t pcr_count = 0;
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uint8_t dump_pcr[MAX_PCR_PORTS];
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static struct option long_options[] = {
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{"version", 0, 0, 'v'},
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@ -408,6 +419,7 @@ int main(int argc, char *argv[])
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{"gfx", 0, 0, 'f'},
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{"ahci", 0, 0, 'R'},
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{"sgx", 0, 0, 'x'},
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{"pcr", required_argument, 0, LONG_OPT_PCR},
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{0, 0, 0, 0}
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};
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@ -479,6 +491,21 @@ int main(int argc, char *argv[])
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case 'x':
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dump_sgx = 1;
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break;
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case LONG_OPT_PCR:
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if (pcr_count < MAX_PCR_PORTS) {
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errno = 0;
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const unsigned long int pcr =
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strtoul(optarg, NULL, 0);
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if (strlen(optarg) == 0 || errno) {
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print_usage(argv[0]);
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exit(1);
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}
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dump_pcr[pcr_count++] = (uint8_t)pcr;
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} else {
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print_usage(argv[0]);
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exit(1);
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}
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break;
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case 'h':
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case '?':
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default:
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@ -685,6 +712,9 @@ int main(int argc, char *argv[])
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if (dump_sgx)
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print_sgx();
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if (pcr_count)
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print_pcr_ports(sb, dump_pcr, pcr_count);
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/* Clean up */
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pcr_cleanup();
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if (ahci)
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@ -29,6 +29,43 @@ uint32_t read_pcr32(const uint8_t port, const uint16_t offset)
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return *(const uint32_t *)(sbbar + (port << 16) + offset);
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}
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static void print_pcr_port(const uint8_t port)
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{
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size_t i = 0;
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uint32_t last_reg = 0;
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bool last_printed = true;
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printf("PCR port offset: 0x%06zx\n\n", (size_t)port << 16);
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for (i = 0; i < PCR_PORT_SIZE; i += 4) {
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const uint32_t reg = read_pcr32(port, i);
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const bool rep = i && last_reg == reg;
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if (!rep) {
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if (!last_printed)
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printf("*\n");
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printf("0x%04zx: 0x%08"PRIx32"\n", i, reg);
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}
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last_reg = reg;
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last_printed = !rep;
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}
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if (!last_printed)
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printf("*\n");
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}
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void print_pcr_ports(struct pci_dev *const sb,
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const uint8_t *const ports, const size_t count)
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{
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size_t i;
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pcr_init(sb);
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for (i = 0; i < count; ++i) {
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printf("\n========== PCR 0x%02x ==========\n\n", ports[i]);
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print_pcr_port(ports[i]);
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}
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}
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void pcr_init(struct pci_dev *const sb)
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{
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bool error_exit = false;
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@ -24,6 +24,8 @@
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uint32_t read_pcr32(uint8_t port, uint16_t offset);
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void print_pcr_ports(struct pci_dev *sb, const uint8_t *ports, size_t count);
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void pcr_init(struct pci_dev *sb);
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void pcr_cleanup(void);
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