superio/nuvoton: Make SuperIO config functions externally available
Change-Id: I05f768c67542770e65279a562c05225b84edca40 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19626 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
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@ -45,7 +45,7 @@
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/* Enable configuration: pass entry key '0x87' into index port dev
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* two times. */
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static void pnp_enter_conf_state(pnp_devfn_t dev)
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void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
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{
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u16 port = dev >> 8;
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outb(NUVOTON_ENTRY_KEY, port);
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@ -53,7 +53,7 @@ static void pnp_enter_conf_state(pnp_devfn_t dev)
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}
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/* Disable configuration: pass exit key '0xAA' into index port dev. */
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static void pnp_exit_conf_state(pnp_devfn_t dev)
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void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
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{
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u16 port = dev >> 8;
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outb(NUVOTON_EXIT_KEY, port);
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@ -62,7 +62,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev)
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/* Bring up early serial debugging output before the RAM is initialized. */
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void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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pnp_enter_conf_state(dev);
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nuvoton_pnp_enter_conf_state(dev);
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if (IS_ENABLED(CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A))
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/* Route GPIO8 pin group to COM A */
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pnp_write_config(dev, 0x2a, 0x40);
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@ -70,5 +70,5 @@ void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_conf_state(dev);
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nuvoton_pnp_exit_conf_state(dev);
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}
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@ -21,6 +21,8 @@
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#include <arch/io.h>
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#include <stdint.h>
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void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
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void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev);
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void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
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#endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */
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