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fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOT 

While pushing the fsp_baytrail code, it was requested that we change
CONFIG_ENABLE_FAST_BOOT to CONFIG_ENABLE_FSP_FAST_BOOT.

These were missed in the change.

Change-Id: If8af3f90b0f5cc9154ff1d3a387f442430f42dee
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/5972
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Martin Roth 2014-06-11 09:35:37 -06:00 committed by Martin Roth
parent 4dfc50b877
commit d866e5872d
2 changed files with 2 additions and 2 deletions
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2
src/mainboard/intel/bayleybay_fsp/Kconfig
View File

@ -68,7 +68,7 @@ config FSP_FILE
config MRC_CACHE_LOC_OVERRIDE
hex
default 0xfff80000
depends on ENABLE_FAST_BOOT
depends on ENABLE_FSP_FAST_BOOT
config CBFS_SIZE
hex

2
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
View File

@ -314,7 +314,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams,
pFspInitParams->NvsBufferPtr = NULL;
pFspRtBuffer->Common.BootMode = BOOT_WITH_FULL_CONFIGURATION;
#if IS_ENABLED(CONFIG_ENABLE_FAST_BOOT)
#if IS_ENABLED(CONFIG_ENABLE_FSP_FAST_BOOT)
/* Find the fastboot cache that was saved in the ROM */
pFspInitParams->NvsBufferPtr = find_and_set_fastboot_cache();
#endif