mb/amd/birman/early_gpio: Add M2 SSD resets
Add early configuration of the GPIOs that control the M2 SSD resets. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I81439d193bdd7296d8a8fea83c5c6be2c75adbea Reviewed-on: https://review.coreboot.org/c/coreboot/+/73989 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
b607c6d584
commit
d8707e7e0f
|
@ -36,6 +36,10 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = {
|
||||||
PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH),
|
PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH),
|
||||||
/* PCIE_RST1_L */
|
/* PCIE_RST1_L */
|
||||||
PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH),
|
PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH),
|
||||||
|
/* M2_SSD0_RST_L */
|
||||||
|
PAD_GPO(GPIO_78, HIGH),
|
||||||
|
/* M2_SSD1_RST_L */
|
||||||
|
PAD_GPO(GPIO_79, HIGH),
|
||||||
|
|
||||||
/* Enable UART 2 */
|
/* Enable UART 2 */
|
||||||
/* UART2_RXD */
|
/* UART2_RXD */
|
||||||
|
|
Loading…
Reference in New Issue