soc/intel/common/block: Add PAM locking function

Some FSPs provide a UPD to allow the bootloader to set the PAM lock bit
instead of the FSP, therefore add a function in the common code to do
this. Source: ADL & TGL FSP integration guides

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1d6642b496617b6e8ccda8a0aa6bfd88ea9dc3ba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Tim Wawrzynczak 2021-08-24 09:20:14 -06:00 committed by Felix Held
parent 30c6ca9838
commit d87af79ace
3 changed files with 15 additions and 0 deletions

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@ -79,6 +79,9 @@ uintptr_t sa_get_tseg_base(void);
size_t sa_get_tseg_size(void); size_t sa_get_tseg_size(void);
/* Fill MMIO resource above 4GB into GNVS */ /* Fill MMIO resource above 4GB into GNVS */
void sa_fill_gnvs(struct global_nvs *gnvs); void sa_fill_gnvs(struct global_nvs *gnvs);
/* API to lock PAM registers */
void sa_lock_pam(void);
/* /*
* SoC overrides * SoC overrides
* *

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@ -306,6 +306,15 @@ void enable_power_aware_intr(void)
MCHBAR8(MCH_PAIR) = pair; MCHBAR8(MCH_PAIR) = pair;
} }
void sa_lock_pam(void)
{
const struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT);
if (!dev)
return;
pci_or_config8(dev, PAM0, PAM_LOCK);
}
static struct device_operations systemagent_ops = { static struct device_operations systemagent_ops = {
.read_resources = systemagent_read_resources, .read_resources = systemagent_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,

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@ -35,6 +35,9 @@
#define PAM5 0x85 #define PAM5 0x85
#define PAM6 0x86 #define PAM6 0x86
/* PAM0 contains the lock bit */
#define PAM_LOCK (1 << 0)
/* Device 0:0.0 MMIO space */ /* Device 0:0.0 MMIO space */
#define MCH_PAIR 0x5418 #define MCH_PAIR 0x5418