GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brya/var/redrix: Disable autonomous GPIO power management 

With cr50 fw 0.3.22 or older version, it needs to disable autonomous
GPIO power management and then can update cr50 fw successfully.

BUG=b:202246591
TEST=FW_NAME=redrix emerge-brya coreboot chromeos-bootimage.

Change-Id: Idc01ebb4d3ef990f24f18bef5424b7d6ba683d49
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Wisley Chen 2021-10-28 17:27:39 +06:00 committed by Patrick Georgi
parent 15235b2d89
commit d88d2da813
1 changed files with 10 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/mainboard/google/brya/variants/redrix/overridetree.cb
View File

@ -31,8 +31,17 @@ fw_config
end end
end end
chip soc/intel/alderlake chip soc/intel/alderlake
# This disables autonomous GPIO power management, otherwise
# old cr50 FW only supports short pulses; need to clarify
# the minimum PCH IRQ pulse width with Intel, b/180111628
register "gpio_override_pm" = "1"
register "gpio_pm[COMM_0]" = "0"
register "gpio_pm[COMM_1]" = "0"
register "gpio_pm[COMM_2]" = "0"
register "gpio_pm[COMM_3]" = "0"
register "gpio_pm[COMM_4]" = "0"
register "gpio_pm[COMM_5]" = "0"
register "SaGv" = "SaGv_Enabled" register "SaGv" = "SaGv_Enabled"
register "CnviBtAudioOffload" = "true" register "CnviBtAudioOffload" = "true"
# FIVR RFI Spread Spectrum 6% # FIVR RFI Spread Spectrum 6%
register "FivrSpreadSpectrum" = "FIVR_SS_6" register "FivrSpreadSpectrum" = "FIVR_SS_6"