This patch reverses an erroneous change that sneaked in during r2972, and broke
flashrom on the plcc-based rev 1 and 1.1 of the Gigabyte m57sli-s4 board. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -309,8 +309,8 @@ chip northbridge/amd/amdk8/root_complex
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#irq 0xc3 = 0x0
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#irq 0xc3 = 0x0
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# SIO pin set 1 input mode
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# SIO pin set 1 input mode
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#irq 0xc8 = 0x0
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#irq 0xc8 = 0x0
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# SIO pin set 2 mixed input/output mode
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# SIO pin set 2 input mode
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irq 0xc9 = 0x40
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irq 0xc9 = 0x0
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# SIO pin set 4 input mode
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# SIO pin set 4 input mode
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#irq 0xcb = 0x0
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#irq 0xcb = 0x0
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# Generate SMI# on EC IRQ
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# Generate SMI# on EC IRQ
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