soc/intel/jasperlake: add processor power limits control support
Add processor power limits control support to configure values for jasperlake soc based platforms. BRANCH=None BUG=None TEST=Built for dedede system Change-Id: Ib5502b225c1158c1f0729ce799ed0b8101f0233f Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/device.h>
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#include <delay.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <intelblocks/systemagent.h>
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#include <intelblocks/power_limit.h>
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#include <soc/iomap.h>
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#include <soc/soc_chip.h>
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#include <soc/systemagent.h>
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/*
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@ -43,9 +46,17 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
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*/
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void soc_systemagent_init(struct device *dev)
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{
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struct soc_power_limits_config *soc_config;
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config_t *config;
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/* Enable Power Aware Interrupt Routing */
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enable_power_aware_intr();
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/* Enable BIOS Reset CPL */
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enable_bios_reset_cpl();
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mdelay(1);
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config = config_of_soc();
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soc_config = &config->power_limits_config;
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set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
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}
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