GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

i82801gx: replace cafed00d/cafebabe by defines 

We're using '0xcafed00d' all over the code as magic for ACPI S3
resume. Let's add a define for that. Also replace 0xcafebabe by
a define.

Change-Id: I5f5dc09561679d19f98771c4f81830a50202c69f
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/33
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Sven Schnelle 2011-06-15 09:26:34 +02:00 committed by Patrick Georgi
parent 5eef65bbbf
commit d8c68a9d08
12 changed files with 14 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/getac/p470/romstage.c
View File

@ -378,7 +378,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
}

2
src/mainboard/ibase/mb899/romstage.c
View File

@ -332,7 +332,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
}

2
src/mainboard/intel/d945gclf/romstage.c
View File

@ -290,7 +290,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
}

2
src/mainboard/kontron/986lcd-m/romstage.c
View File

@ -431,7 +431,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
}

2
src/mainboard/lenovo/t60/mainboard.c
View File

@ -46,7 +46,7 @@ static void mainboard_enable(device_t dev)
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
if (dev0 && pci_read_config32(dev0, SKPAD) == 0xcafed00d)
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));

2
src/mainboard/lenovo/t60/romstage.c
View File

@ -333,7 +333,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
/* Set legacy Brightness control to full brightness */

2
src/mainboard/lenovo/x60/mainboard.c
View File

@ -47,7 +47,7 @@ static void mainboard_enable(device_t dev)
/* If we're resuming from suspend, blink suspend LED */
dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
if (dev0 && pci_read_config32(dev0, SKPAD) == 0xcafed00d)
if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
ec_write(0x0c, 0xc7);
idedev = dev_find_slot(0, PCI_DEVFN(0x1f,1));

2
src/mainboard/lenovo/x60/romstage.c
View File

@ -335,7 +335,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
/* Set legacy Brightness control to full brightness */

2
src/mainboard/roda/rk886ex/romstage.c
View File

@ -367,7 +367,7 @@ void main(unsigned long bist)
memcpy(resume_backup_memory, (void *)CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
/* Magic for S3 resume */
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafed00d);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_ACPI_S3_MAGIC);
}
#endif
}

2
src/northbridge/intel/i945/early_init.c
View File

@ -186,7 +186,7 @@ static void i945_setup_bars(void)
pci_write_config8(PCI_DEV(0, 0x00, 0), PAM5, 0x33);
pci_write_config8(PCI_DEV(0, 0x00, 0), PAM6, 0x33);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, 0xcafebabe);
pci_write_config32(PCI_DEV(0, 0x00, 0), SKPAD, SKPAD_NORMAL_BOOT_MAGIC);
printk(BIOS_DEBUG, " done.\n");
/* Wait for MCH BAR to come up */

4
src/northbridge/intel/i945/northbridge.c
View File

@ -257,11 +257,11 @@ extern u8 acpi_slp_type;
static void northbridge_init(struct device *dev)
{
switch (pci_read_config32(dev, SKPAD)) {
case 0xcafebabe:
case SKPAD_NORMAL_BOOT_MAGIC:
printk(BIOS_DEBUG, "Normal boot.\n");
acpi_slp_type=0;
break;
case 0xcafed00d:
case SKPAD_ACPI_S3_MAGIC:
printk(BIOS_DEBUG, "S3 Resume.\n");
acpi_slp_type=3;
break;

2
src/southbridge/intel/i82801gx/i82801gx.h
View File

@ -365,5 +365,7 @@ void enable_usbdebug(unsigned int port);
#define SS_CNT 0x50
#define C3_RES 0x54
#define SKPAD_ACPI_S3_MAGIC 0xcafed00d
#define SKPAD_NORMAL_BOOT_MAGIC 0xcafebabe
#endif /* __ACPI__ */
#endif /* SOUTHBRIDGE_INTEL_I82801GX_I82801GX_H */