PCI ops: Rename pcie_xx() to pci_mmio_xx()
Change-Id: I7fa65197b8165b9b0b74937f9ba455c48308da37 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17530 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -246,6 +246,60 @@ typedef u32 device_t;
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#include <arch/pci_io_cfg.h>
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#include <arch/pci_io_cfg.h>
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#include <arch/pci_mmio_cfg.h>
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#include <arch/pci_mmio_cfg.h>
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static inline __attribute__((always_inline))
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uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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return pci_mmio_read_config8(dev, where);
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else
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return pci_io_read_config8(dev, where);
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}
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static inline __attribute__((always_inline))
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uint16_t pci_read_config16(pci_devfn_t dev, unsigned int where)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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return pci_mmio_read_config16(dev, where);
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else
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return pci_io_read_config16(dev, where);
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}
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static inline __attribute__((always_inline))
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uint32_t pci_read_config32(pci_devfn_t dev, unsigned int where)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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return pci_mmio_read_config32(dev, where);
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else
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return pci_io_read_config32(dev, where);
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}
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static inline __attribute__((always_inline))
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void pci_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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pci_mmio_write_config8(dev, where, value);
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else
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pci_io_write_config8(dev, where, value);
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}
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static inline __attribute__((always_inline))
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void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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pci_mmio_write_config16(dev, where, value);
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else
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pci_io_write_config16(dev, where, value);
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}
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static inline __attribute__((always_inline))
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void pci_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
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{
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if (IS_ENABLED(CONFIG_MMCONF_SUPPORT_DEFAULT))
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pci_mmio_write_config32(dev, where, value);
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else
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pci_io_write_config32(dev, where, value);
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}
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#define PCI_DEV_INVALID (0xffffffffU)
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#define PCI_DEV_INVALID (0xffffffffU)
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static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
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static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
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{
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{
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@ -94,14 +94,4 @@ void pci_io_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
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outl(value, 0xCFC);
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outl(value, 0xCFC);
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}
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}
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#if !CONFIG_MMCONF_SUPPORT_DEFAULT
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#define pci_read_config8 pci_io_read_config8
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#define pci_read_config16 pci_io_read_config16
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#define pci_read_config32 pci_io_read_config32
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#define pci_write_config8 pci_io_write_config8
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#define pci_write_config16 pci_io_write_config16
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#define pci_write_config32 pci_io_write_config32
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#endif
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#endif /* _PCI_IO_CFG_H */
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#endif /* _PCI_IO_CFG_H */
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@ -18,11 +18,10 @@
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#include <arch/io.h>
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#include <arch/io.h>
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#if CONFIG_MMCONF_SUPPORT
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#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
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#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
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u8 pci_mmio_read_config8(pci_devfn_t dev, unsigned int where)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
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@ -30,7 +29,7 @@ u8 pcie_read_config8(pci_devfn_t dev, unsigned int where)
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}
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}
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
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u16 pci_mmio_read_config16(pci_devfn_t dev, unsigned int where)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
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@ -38,7 +37,7 @@ u16 pcie_read_config16(pci_devfn_t dev, unsigned int where)
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}
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}
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
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u32 pci_mmio_read_config32(pci_devfn_t dev, unsigned int where)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
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@ -46,7 +45,7 @@ u32 pcie_read_config32(pci_devfn_t dev, unsigned int where)
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}
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}
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
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void pci_mmio_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | where);
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@ -54,7 +53,7 @@ void pcie_write_config8(pci_devfn_t dev, unsigned int where, u8 value)
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}
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}
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
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void pci_mmio_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~1));
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@ -62,30 +61,11 @@ void pcie_write_config16(pci_devfn_t dev, unsigned int where, u16 value)
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}
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}
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static inline __attribute__ ((always_inline))
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static inline __attribute__ ((always_inline))
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void pcie_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
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void pci_mmio_write_config32(pci_devfn_t dev, unsigned int where, u32 value)
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{
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{
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void *addr;
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void *addr;
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
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addr = (void *)(uintptr_t)(DEFAULT_PCIEXBAR | dev | (where & ~3));
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write32(addr, value);
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write32(addr, value);
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}
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}
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#define pci_mmio_read_config8 pcie_read_config8
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#define pci_mmio_read_config16 pcie_read_config16
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#define pci_mmio_read_config32 pcie_read_config32
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#define pci_mmio_write_config8 pcie_write_config8
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#define pci_mmio_write_config16 pcie_write_config16
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#define pci_mmio_write_config32 pcie_write_config32
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#if CONFIG_MMCONF_SUPPORT_DEFAULT
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#define pci_read_config8 pcie_read_config8
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#define pci_read_config16 pcie_read_config16
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#define pci_read_config32 pcie_read_config32
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#define pci_write_config8 pcie_write_config8
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#define pci_write_config16 pcie_write_config16
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#define pci_write_config32 pcie_write_config32
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#endif
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#endif /* CONFIG_MMCONF_SUPPORT */
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#endif /* _PCI_MMIO_CFG_H */
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#endif /* _PCI_MMIO_CFG_H */
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