From d8e8c873c055735930c9e38ac75f7a48d362af53 Mon Sep 17 00:00:00 2001
From: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Date: Mon, 8 Nov 2021 14:28:54 +0800
Subject: [PATCH] soc/mediatek/mt8186: initialize SSPM

SSPM is "Secure System Power Manager" that provides power control in
secure domain. The initialization flow is to load SSPM firmware to
its SRAM space and then enable.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I92eb501a1e48dd02d2f94ff392933261e6a42391
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
---
 src/soc/mediatek/mt8186/Kconfig                  |  6 ++++++
 src/soc/mediatek/mt8186/Makefile.inc             | 14 ++++++++++++++
 src/soc/mediatek/mt8186/include/soc/addressmap.h |  2 ++
 src/soc/mediatek/mt8186/soc.c                    |  2 ++
 4 files changed, 24 insertions(+)

diff --git a/src/soc/mediatek/mt8186/Kconfig b/src/soc/mediatek/mt8186/Kconfig
index 9b8708a0c1..dc3f9bb070 100644
--- a/src/soc/mediatek/mt8186/Kconfig
+++ b/src/soc/mediatek/mt8186/Kconfig
@@ -16,6 +16,12 @@ config VBOOT
 	select VBOOT_SEPARATE_VERSTAGE
 	select VBOOT_RETURN_FROM_VERSTAGE
 
+config SSPM_FIRMWARE
+	string
+	default "sspm.bin"
+	help
+	  The file name of the MediaTek SSPM firmware.
+
 config FLASH_DUAL_READ
 	bool
 	default y
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc
index 0646f6c97d..00b12e8ce5 100644
--- a/src/soc/mediatek/mt8186/Makefile.inc
+++ b/src/soc/mediatek/mt8186/Makefile.inc
@@ -41,10 +41,12 @@ ramstage-y += emi.c
 ramstage-y += ../common/flash_controller.c
 ramstage-y += ../common/gpio.c gpio.c
 ramstage-y += ../common/i2c.c i2c.c
+ramstage-y += ../common/mcu.c
 ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
 ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
 ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 ramstage-y += soc.c
+ramstage-y += ../common/sspm.c
 ramstage-y += ../common/timer.c timer.c
 ramstage-y += ../common/uart.c
 ramstage-y += ../common/usb.c usb.c
@@ -54,6 +56,18 @@ ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c
 CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include
 CPPFLAGS_common += -Isrc/soc/mediatek/common/include
 
+MT8186_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8186
+
+mcu-firmware-files := \
+	$(CONFIG_SSPM_FIRMWARE)
+
+$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \
+	  $(eval $(fw)-file := $(MT8186_BLOB_DIR)/$(fw)) \
+	  $(eval $(fw)-type := raw) \
+	  $(eval $(fw)-compression := LZ4) \
+	  $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \
+)
+
 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
 	./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
 
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index cabafb62b3..6a5ce5c350 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -45,6 +45,8 @@ enum {
 	EMI0_BASE			= IO_PHYS + 0x00219000,
 	EMI0_MPU_BASE			= IO_PHYS + 0x0021B000,
 	DRAMC_CHA_AO_BASE		= IO_PHYS + 0x00220000,
+	SSPM_SRAM_BASE			= IO_PHYS + 0x00400000,
+	SSPM_CFG_BASE			= IO_PHYS + 0x00440000,
 	SFLASH_REG_BASE			= IO_PHYS + 0x01000000,
 	AUXADC_BASE			= IO_PHYS + 0x01001000,
 	UART0_BASE			= IO_PHYS + 0x01002000,
diff --git a/src/soc/mediatek/mt8186/soc.c b/src/soc/mediatek/mt8186/soc.c
index dcb9703e07..e20b447fdb 100644
--- a/src/soc/mediatek/mt8186/soc.c
+++ b/src/soc/mediatek/mt8186/soc.c
@@ -3,6 +3,7 @@
 #include <device/device.h>
 #include <soc/emi.h>
 #include <soc/mmu_operations.h>
+#include <soc/sspm.h>
 #include <symbols.h>
 
 static void soc_read_resources(struct device *dev)
@@ -13,6 +14,7 @@ static void soc_read_resources(struct device *dev)
 static void soc_init(struct device *dev)
 {
 	mtk_mmu_disable_l2c_sram();
+	sspm_init();
 }
 
 static struct device_operations soc_ops = {