mb/google/brya/var/anahera: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to fix display flicker BUG=b:292403156 TEST=Verified on the defeat board Change-Id: If0c0e655c5d32f39b90635bb3c1d13d8b6993b59 Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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@ -23,6 +23,11 @@ fw_config
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end
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end
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chip soc/intel/alderlake
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chip soc/intel/alderlake
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register "sagv" = "SaGv_Enabled"
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register "sagv" = "SaGv_Enabled"
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# As per Intel Advisory doc#723158, the change is required to prevent possible
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# display flickering issue.
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register "usb2_phy_sus_pg_disable" = "1"
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# Acoustic settings
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# Acoustic settings
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register "acoustic_noise_mitigation" = "1"
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register "acoustic_noise_mitigation" = "1"
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register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
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register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
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