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mb/google/dedede/var/drawcia: Generate SPD ID for supported parts 

Add supported memory parts in the mem_list_variant.txt and generate the
SPD ID for the parts. The memory parts being added are:
H9HCNNNBKMMLXR-NEE
K4U6E3S4AA-MGCR

BUG=None
TEST=Build the drawcia board.

Change-Id: Id05c0b2a87b64bfedc761949cbc8ad6cf7dd73a5
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43505
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Marco Chen <marcochen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2020-07-16 00:41:50 -06:00 committed by Tim Wawrzynczak
parent dcee4b6fa9
commit d90616278c
3 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc
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@ -2,4 +2,4 @@
## This is an auto-generated file. Do not edit!! ## This is an auto-generated file. Do not edit!!
SPD_SOURCES = SPD_SOURCES =
SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR

2
src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt
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@ -1,2 +1,4 @@
DRAM Part Name ID to assign DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000) MT53E512M32D2NP-046 WT:E 0 (0000)
H9HCNNNBKMMLXR-NEE 0 (0000)
K4U6E3S4AA-MGCR 0 (0000)

2
src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt
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@ -1 +1,3 @@
MT53E512M32D2NP-046 WT:E MT53E512M32D2NP-046 WT:E
H9HCNNNBKMMLXR-NEE
K4U6E3S4AA-MGCR