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soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range 

The base address of the 16 MB flash range was reported as 0xFFF00000
this causes the range to extend above the 4GB boundary.

Change the base to 0xFF000000 as is the case with e.g. Skylake.

BUG=N/A
TEST=build

Change-Id: Ia8de01769ced00c5ae13f255760401933230b88c
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37694
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Wim Vervoorn 2019-12-13 12:06:44 +01:00 committed by Patrick Georgi
parent 9cb88a70f7
commit d908916642
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/cannonlake/acpi/northbridge.asl
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@ -307,7 +307,7 @@ Device (PDRC)
Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */
Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH)
Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)

2
src/soc/intel/icelake/acpi/northbridge.asl
View File

@ -308,7 +308,7 @@ Device (PDRC)
Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */
Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH)
Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */
Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)