mb/intel/glkrvp: Re-size flash WP_RO segment
Update the size in WP_RO segment of the flash to accommodate builds using debug FSP. Change-Id: I8b24422e1eef2d0a81006286d4fc58f238fdce11 Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Reviewed-on: https://review.coreboot.org/25255 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -7,9 +7,9 @@ FLASH 16M {
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FMAP@0x0 0x800
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RO_FRID@0x800 0x40
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RO_FRID_PAD@0x840 0x7c0
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COREBOOT(CBFS)@0x1000 0x19b000
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GBB@0x19c000 0x40000
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RO_UNUSED@0x1dc000 0x20000
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COREBOOT(CBFS)@0x1000 0x1ab000
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GBB@0x1ac000 0x40000
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RO_UNUSED@0x1ec000 0x10000
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}
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}
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MISC_RW@0x400000 0x4a000 {
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