soc/amd: factor out ACPI_SSDT_PSD_INDEPENDENT to common AMD ACPI Kconfig

Now that the code using the ACPI_SSDT_PSD_INDEPENDENT Kconfig symbol is
moved to soc/amd/common/block/acpi/cpu_power_state.c, also move the
Kconfig symbol to the Kconfig file in this directory.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ide18111df38d4e9c81f7d183f49107f382385d85
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-03-07 18:59:42 +01:00
parent b47be02179
commit d91625da60
6 changed files with 8 additions and 40 deletions

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@ -318,14 +318,6 @@ config DISABLE_KEYBOARD_RESET_PIN
functionality isn't disabled, configuring it as an output and driving functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset. it as 0 will cause a reset.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
menu "PSP Configuration Options" menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX config AMD_FWM_POSITION_INDEX

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@ -26,3 +26,11 @@ config SOC_AMD_COMMON_BLOCK_ACPI_GPIO
config SOC_AMD_COMMON_BLOCK_ACPI_IVRS config SOC_AMD_COMMON_BLOCK_ACPI_IVRS
bool bool
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.

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@ -299,14 +299,6 @@ config DISABLE_KEYBOARD_RESET_PIN
help help
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L. Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
menu "PSP Configuration Options" menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX config AMD_FWM_POSITION_INDEX

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@ -325,14 +325,6 @@ config DISABLE_KEYBOARD_RESET_PIN
help help
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L. Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
config FEATURE_DYNAMIC_DPTC config FEATURE_DYNAMIC_DPTC
bool bool
depends on SOC_AMD_COMMON_BLOCK_ACPI_DPTC depends on SOC_AMD_COMMON_BLOCK_ACPI_DPTC

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@ -298,14 +298,6 @@ config DISABLE_KEYBOARD_RESET_PIN
help help
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L. Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
menu "PSP Configuration Options" menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX config AMD_FWM_POSITION_INDEX

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@ -316,14 +316,6 @@ config ACPI_BERT_SIZE
Specify the amount of DRAM reserved for gathering the data used to Specify the amount of DRAM reserved for gathering the data used to
generate the ACPI table. generate the ACPI table.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
config CHROMEOS config CHROMEOS
select ALWAYS_LOAD_OPROM select ALWAYS_LOAD_OPROM
select ALWAYS_RUN_OPROM select ALWAYS_RUN_OPROM