From d91a6842bfb718779125920318a7b632d58506b0 Mon Sep 17 00:00:00 2001 From: Shon Wang Date: Tue, 15 Feb 2022 09:52:40 +0800 Subject: [PATCH] mb/google/brya/var/vell: Correct MIPI camera info The CIO2 port was incorrectly set to 2, while the correct port is 1 BUG=b:210801553 TEST=Build and boot on vell, camera works correctly now Change-Id: I53d8448ed0e12777456af9b0bc65a04595b47e37 Signed-off-by: Shon Wang Reviewed-on: https://review.coreboot.org/c/coreboot/+/61946 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/vell/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index 15ba44ee87..9250dc65ca 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -136,7 +136,7 @@ chip soc/intel/alderlake register "cio2_num_ports" = "1" register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0"" - register "cio2_prt[0]" = "2" + register "cio2_prt[0]" = "1" device generic 0 on end end end