jasperlake: enable DPTF functionality for dedede

Enable DPTF functionality on jasperlake based dedede platform

BRANCH=None
BUG=None
TEST=Built for dedede system

Change-Id: I17b6e4e96abee6181b0d1f94c356a32aa82c19b9
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41668
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sumeet R Pawnikar 2020-06-18 14:10:10 +05:30 committed by Tim Wawrzynczak
parent 8c28e51a16
commit d92d0e24ae
9 changed files with 87 additions and 1 deletions

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@ -55,4 +55,13 @@ DefinitionBlock(
/* ACPI code for EC functions */ /* ACPI code for EC functions */
#include <ec/google/chromeec/acpi/ec.asl> #include <ec/google/chromeec/acpi/ec.asl>
} }
/* Dynamic Platform Thermal Framework */
Scope (\_SB)
{
/* Per board variant specific definitions. */
#include <variant/acpi/dptf.asl>
/* Include common dptf ASL files */
#include <soc/intel/common/acpi/dptf/dptf.asl>
}
} }

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@ -144,6 +144,17 @@ chip soc/intel/jasperlake
# Enable Speed Shift Technology support # Enable Speed Shift Technology support
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
# Enable DPTF
register "dptf_enable" = "1"
register "power_limits_config" = "{
.tdp_pl1_override = 6,
.tdp_pl2_override = 20,
}"
# Enable processor thermal control
register "Device4Enable" = "1"
# chipset_lockdown configuration # chipset_lockdown configuration
# Use below format to override value in overridetree.cb if required # Use below format to override value in overridetree.cb if required
# format: # format:
@ -153,7 +164,7 @@ chip soc/intel/jasperlake
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device device pci 04.0 on end # SA Thermal device
device pci 05.0 off end # IPU device pci 05.0 off end # IPU
device pci 09.0 off end # Intel Trace Hub device pci 09.0 off end # Intel Trace Hub
device pci 12.6 off end # GSPI 2 device pci 12.6 off end # GSPI 2

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@ -0,0 +1,48 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Below values might change after Thermal Tuning. */
#define DPTF_CPU_PASSIVE 90
#define DPTF_CPU_CRITICAL 99
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Memory"
#define DPTF_TSR0_PASSIVE 80
#define DPTF_TSR0_CRITICAL 90
#define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "Ambient"
#define DPTF_TSR1_PASSIVE 55
#define DPTF_TSR1_CRITICAL 80
Name (DTRT, Package () {
/* CPU Throttle Effect on CPU */
Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 100, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 0 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 },
/* CPU Effect on Temp Sensor 1 */
Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 },
})
Name (MPPC, Package ()
{
0x2, /* Revision */
Package () { /* Power Limit 1 */
0, /* PowerLimitIndex, 0 for Power Limit 1 */
3000, /* PowerLimitMinimum */
6000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
200 /* StepSize */
},
Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */
6000, /* PowerLimitMinimum */
20000, /* PowerLimitMaximum */
1000, /* TimeWindowMinimum */
1000, /* TimeWindowMaximum */
1000 /* StepSize */
}
})

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>

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@ -0,0 +1,3 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/acpi/dptf.asl>