soc/intel/braswell/northcluster.c: Reserve local APIC resources

The resources of the local APIC are not reserved.
Use mmio_resource() to add local APIC resources.

BUG=N/A
TEST=Intel CherryHill CRB

Change-Id: Ieb9de45098d507d59f1974eddb7a94cb18ef7903
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29375
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Frans Hendriks 2018-11-26 11:01:56 +01:00 committed by Patrick Georgi
parent f01a15952a
commit d97eb646e7
1 changed files with 8 additions and 0 deletions

View File

@ -21,6 +21,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <fsp/memmap.h> #include <fsp/memmap.h>
#include <cpu/x86/lapic.h>
#include <fsp/util.h> #include <fsp/util.h>
#include <soc/iomap.h> #include <soc/iomap.h>
#include <soc/iosf.h> #include <soc/iosf.h>
@ -148,6 +149,13 @@ static void nc_read_resources(struct device *dev)
reserved_ram_resource(dev, index++, (0xc0000 >> 10), reserved_ram_resource(dev, index++, (0xc0000 >> 10),
(0x100000 - 0xc0000) >> 10); (0x100000 - 0xc0000) >> 10);
/*
* Reserve local APIC
*/
base_k = RES_IN_KIB(LAPIC_DEFAULT_BASE);
size_k = RES_IN_KIB(0x00100000);
mmio_resource(dev, index++, base_k, size_k);
chromeos_reserve_ram_oops(dev, index++); chromeos_reserve_ram_oops(dev, index++);
} }