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acpi/tpm: remove non-existent IRQ for Infineon TPM chip 

The Infineon TPM chip used on these platforms doesn't use an IRQ
line; the Linux kernel has been patched to work around this, but better
to remove it completely.

Test: boot linux on google/wolf,lulu,cyan without tpm_tis.interrupts=0
kernel parameter, observe no abnormal delays in boot or resume from S3.

Change-Id: Id510c73cfdc14b7f82b0cc695691b55423185a0b
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/22582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
This commit is contained in:
Matt DeVillier 2017-03-17 19:11:12 -05:00 committed by Stefan Reinauer
parent f4c91e6613
commit d9802f3703
5 changed files with 0 additions and 5 deletions
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1
src/soc/intel/baytrail/acpi/lpc.asl
View File

@ -155,7 +155,6 @@ Device (LPCB)
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
}) })
} }
#endif #endif

1
src/soc/intel/braswell/acpi/lpc.asl
View File

@ -157,7 +157,6 @@ Device (LPCB)
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
}) })
} }
#endif #endif

1
src/soc/intel/fsp_baytrail/acpi/lpc.asl
View File

@ -155,7 +155,6 @@ Device (LPCB)
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
}) })
} }
#endif #endif

1
src/southbridge/intel/i82801gx/acpi/lpc.asl
View File

@ -218,7 +218,6 @@ Device (LPCB)
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
}) })
} }
#endif #endif

1
src/southbridge/intel/lynxpoint/acpi/lpc.asl
View File

@ -243,7 +243,6 @@ Device (LPCB)
IO (Decode16, 0x2e, 0x2e, 0x01, 0x02) IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10) IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000) Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
IRQ (Edge, Activehigh, Exclusive) { 6 }
}) })
} }
#endif #endif