mb/clevo/cml-u: Configure IRQ as level triggered for HID over I2C

As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4,
the interrupt line used by the device is required to be level triggered.
Hence, this change updates the configuration of the HID over I2C devices
to be level triggered.

References:
[1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx
[2] https://review.coreboot.org/c/coreboot/+/47417/2/src/mainboard/google/hatch/variants/baseboard/gpio.c#b182

Tested successfully on Clevo L141CU.

Change-Id: Ia232c0a11546aa6d17614f4cab07c255e58f2fed
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner 2020-11-25 00:38:19 +01:00
parent 2c6a725e2b
commit d990455c0a
2 changed files with 2 additions and 2 deletions

View File

@ -107,7 +107,7 @@ chip soc/intel/cannonlake
chip drivers/i2c/hid
register "generic.hid" = ""ELAN040D""
register "generic.desc" = ""ELAN Touchpad""
register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end

View File

@ -62,7 +62,7 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_B2, UP_20K), /* CNVI_WAKE#
(UART_WAKE# in M.2 spec; unused)
*/
PAD_CFG_GPI_APIC_EDGE_LOW(GPP_B3, NONE, PLTRST),/* GPP_B3 (touchpad interrupt) */
PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST), /* GPP_B3 (touchpad interrupt) */
PAD_NC(GPP_B4, UP_20K),
PAD_NC(GPP_B5, UP_20K),
PAD_NC(GPP_B6, UP_20K),