mb/clevo/cml-u: Configure IRQ as level triggered for HID over I2C
As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4, the interrupt line used by the device is required to be level triggered. Hence, this change updates the configuration of the HID over I2C devices to be level triggered. References: [1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx [2] https://review.coreboot.org/c/coreboot/+/47417/2/src/mainboard/google/hatch/variants/baseboard/gpio.c#b182 Tested successfully on Clevo L141CU. Change-Id: Ia232c0a11546aa6d17614f4cab07c255e58f2fed Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -107,7 +107,7 @@ chip soc/intel/cannonlake
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN040D""
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register "generic.desc" = ""ELAN Touchpad""
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register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_B3_IRQ)"
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
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register "generic.probed" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 15 on end
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@ -62,7 +62,7 @@ static const struct pad_config gpio_table[] = {
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PAD_NC(GPP_B2, UP_20K), /* CNVI_WAKE#
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(UART_WAKE# in M.2 spec; unused)
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*/
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PAD_CFG_GPI_APIC_EDGE_LOW(GPP_B3, NONE, PLTRST),/* GPP_B3 (touchpad interrupt) */
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PAD_CFG_GPI_APIC_LOW(GPP_B3, NONE, PLTRST), /* GPP_B3 (touchpad interrupt) */
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PAD_NC(GPP_B4, UP_20K),
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PAD_NC(GPP_B5, UP_20K),
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PAD_NC(GPP_B6, UP_20K),
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