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mb/ocp/monolake: use VPD data to configure FSP UPD 

Summary:
This patch calls monolake board specific function to query
settings stored in VPD binary blob to configure FSP UPD
variable HyperThreading.

Test Plan:
* Build an OCP MonoLake coreboot image, run following command
to initialize RW_VPD and insert HyperThreading key:
vpd -f build/coreboot.rom -O -i RW_VPD -s 'HyperThreading=0'
* Flash the image to MonoLake, boot and observe following
message in boot log:
Detected 16 CPU threads

If RW_VPD partition does not exist, or if HyperThreading
key/value pair does not exist, the boot log has:
Detected 32 CPU threads

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I799d27734fe4b67cd1f40cae710151a01562b1b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Jonathan Zhang 2019-07-30 11:29:33 -07:00 committed by Patrick Georgi
parent b5392f930d
commit d9a6afe1a4
1 changed files with 22 additions and 1 deletions
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23
src/mainboard/ocp/monolake/romstage.c
View File

@ -17,6 +17,7 @@
#include <stddef.h> #include <stddef.h>
#include <soc/romstage.h> #include <soc/romstage.h>
#include <drivers/intel/fsp1_0/fsp_util.h> #include <drivers/intel/fsp1_0/fsp_util.h>
#include <drivers/vpd/vpd.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cf9_reset.h> #include <cf9_reset.h>
#include <console/console.h> #include <console/console.h>
@ -24,6 +25,9 @@
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/lpc.h> #include <soc/lpc.h>
/* Define the strings for UPD variables that could be customized */
#define FSP_VAR_HYPERTHREADING "HyperThreading"
/** /**
* /brief mainboard call for setup that needs to be done before fsp init * /brief mainboard call for setup that needs to be done before fsp init
* *
@ -57,9 +61,26 @@ void late_mainboard_romstage_entry(void)
0x0c0ca1); 0x0c0ca1);
} }
/*
* This function sets up global variable to store VPD binary blob info,
* and use settings in the binary blob to configure UPD.
*/
static void board_configure_upd(UPD_DATA_REGION *UpdData)
{
u8 val;
if (vpd_get_bool(FSP_VAR_HYPERTHREADING, VPD_RW, &val))
UpdData->HyperThreading = val;
}
/** /**
* /brief customize fsp parameters here if needed * /brief customize fsp parameters, use data stored in VPD binary blob
* to configure FSP UPD variables.
*/ */
void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
{ {
UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr;
if (CONFIG(VPD))
board_configure_upd(UpdData);
} }