From d9beb7bc505e2313b3701eab81308385bd3c8649 Mon Sep 17 00:00:00 2001
From: Sridhar Siricilla <sridhar.siricilla@intel.com>
Date: Fri, 18 Mar 2022 22:19:14 +0530
Subject: [PATCH] mb/google/brya: Deselect
 ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR

The patch deselects ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR Kconfig which
updates PMC settings in the IFD for Alder Lake A0 silicon.
As Alder Lake A0 is intermediate stepping, and the IFD is locked in the
production systems, so the Kconfig is deselected.

BUG=b:190588098
BRANCH=firmware-brya-14505.B
TEST=Build the coreboot for Gimble

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I81fe7c792dd82d9d547d318ebda55ee4a0f3ac96
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
 src/mainboard/google/brya/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 1d29b6fb82..199db117bb 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -1,6 +1,5 @@
 config BOARD_GOOGLE_BRYA_COMMON
 	def_bool n
-	select ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
 	select BOARD_ROMSIZE_KB_32768
 	select CR50_USE_LONG_INTERRUPT_PULSES
 	select DRIVERS_GENERIC_ALC1015