sb/intel/lynxpoint: Do not determine PCH type at runtime

Both PCH types are very different, and mixing the code for both together
isn't useful. First of all, inline `pch_is_lp` to return a constant.
This allows the compiler to optimize out unused code, which results in
smaller executables. For the Asrock B85M Pro4, it's about 2.5 KiB less.

Subsequent commits will further split the southbridge code.

Change-Id: Iba904acf64096478d1b76ffd05a076f0203502f8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45047
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/intel/lynxpoint/early_pch.c

@@ -35,11 +35,6 @@ enum pch_platform_type get_pch_platform_type(void)
 	return PCH_TYPE_DESKTOP;
 }
 
-int pch_is_lp(void)
-{
-	return get_pch_platform_type() == PCH_TYPE_ULT;
-}
-
 static void pch_enable_bars(void)
 {
 	pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1);

src/southbridge/intel/lynxpoint/pch.c

@@ -57,11 +57,6 @@ enum pch_platform_type get_pch_platform_type(void)
 	return PCH_TYPE_DESKTOP;
 }
 
-int pch_is_lp(void)
-{
-	return get_pch_platform_type() == PCH_TYPE_ULT;
-}
-
 u16 get_pmbase(void)
 {
 	static u16 pmbase;

src/southbridge/intel/lynxpoint/pch.h

@@ -69,6 +69,11 @@
 
 #ifndef __ACPI__
 
+static inline int pch_is_lp(void)
+{
+	return CONFIG(INTEL_LYNXPOINT_LP);
+}
+
 /* PCH platform types, safe for MRC consumption */
 enum pch_platform_type {
 	PCH_TYPE_MOBILE	 = 0,
@@ -84,7 +89,6 @@ void usb_xhci_route_all(void);
 enum pch_platform_type get_pch_platform_type(void);
 int pch_silicon_revision(void);
 int pch_silicon_id(void);
-int pch_is_lp(void);
 u16 get_pmbase(void);
 u16 get_gpiobase(void);