superio/nuvoton: factor out generic romstage components
The romstage of Nuvoton Super I/O chips (but not Nuvoton BMC chips) is identical, so the early_serial.c file can be moved under nuvoton/common. The Nuvoton BMC chip WPCM450 is however left untouched. Change-Id: I4663176c1003b24a49a9fe5f9ebd27a1963b5565 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/5909 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
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@ -17,7 +17,14 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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# Generic Nuvoton romstage driver - Just enough UART initialisation code for
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# romstage.
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config SUPERIO_NUVOTON_COMMON_ROMSTAGE
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bool
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config SUPERIO_NUVOTON_WPCM450
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config SUPERIO_NUVOTON_WPCM450
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bool
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bool
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config SUPERIO_NUVOTON_NCT5104D
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config SUPERIO_NUVOTON_NCT5104D
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bool
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bool
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select SUPERIO_NUVOTON_COMMON_ROMSTAGE
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@ -17,5 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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## include generic nuvoton pre-ram stage driver
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romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
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subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
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subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
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subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
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subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
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@ -0,0 +1,75 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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* Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* A generic romstage (pre-ram) driver for Nuvoton variant Super I/O chips.
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*
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* The following is derived directly from the vendor Nuvoton's data-sheets:
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*
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* To toggle between `configuration mode` and `normal operation mode` as to
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* manipulate the various LDN's in Nuvoton Super I/O's we are required to
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* pass magic numbers `passwords keys`.
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*
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* NUVOTON_ENTRY_KEY := enable configuration : 0x87
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* NUVOTON_EXIT_KEY := disable configuration : 0xAA
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*
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* To modify a LDN's configuration register, we use the index port to select
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* the index of the LDN and then write to the data port to alter the
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* parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
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* user modified pair is 0x2E, 0x2F respectively.
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*
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*/
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include "nuvoton.h"
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#define NUVOTON_ENTRY_KEY 0x87
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#define NUVOTON_EXIT_KEY 0xAA
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/* Enable configuration: pass entry key '0x87' into index port dev
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* two times. */
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static void pnp_enter_conf_state(device_t dev)
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{
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u16 port = dev >> 8;
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outb(NUVOTON_ENTRY_KEY, port);
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outb(NUVOTON_ENTRY_KEY, port);
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}
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/* Disable configuration: pass exit key '0xAA' into index port dev. */
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static void pnp_exit_conf_state(device_t dev)
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{
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u16 port = dev >> 8;
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outb(NUVOTON_EXIT_KEY, port);
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}
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/* Bring up early serial debugging output before the RAM is initialized. */
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void nuvoton_enable_serial(device_t dev, u16 iobase)
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{
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_conf_state(dev);
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}
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@ -1,7 +1,8 @@
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/*
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/*
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* This file is part of the coreboot project.
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* This file is part of the coreboot project.
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*
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*
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* Copyright (C) 2011 Advanced Micro Devices, Inc.
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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* Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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@ -15,32 +16,15 @@
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*
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*
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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*/
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#ifndef SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
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#define SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
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#include <arch/io.h>
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <stdint.h>
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#include "nct5104d.h"
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static void pnp_enter_extended_mode(device_t dev)
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void nuvoton_enable_serial(device_t dev, u16 iobase);
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{
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u16 port = dev >> 8;
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outb(0x87,port);
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outb(0x87,port);
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}
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static void pnp_exit_extended_mode(device_t dev)
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#endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */
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{
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u16 port = dev >> 8;
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outb(0xaa,port);
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}
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void nct5104d_enable_serial(device_t dev, u16 iobase)
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{
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pnp_enter_extended_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev,0);
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pnp_set_iobase(dev,PNP_IDX_IO0, iobase);
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pnp_set_enable(dev,1);
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pnp_exit_extended_mode(dev);
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}
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@ -18,5 +18,4 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += early_init.c
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += superio.c
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ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += superio.c
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@ -37,6 +37,4 @@
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#define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
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#define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
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void nct5104d_enable_serial(device_t dev, u16 iobase);
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#endif /* SUPERIO_NUVOTON_NCT5104D_NCT5104D_H */
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#endif /* SUPERIO_NUVOTON_NCT5104D_NCT5104D_H */
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