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mb/google/brya: Lock TPM pin in brask and brya baseboards 

This applies a configuration lock to the TPM I2C and IRQ GPIO for
all brya and brask variants.

BUG=b:208827718
TEST=cat /sys/kernel/debug/pinctrl/INTC1055\:00/pins suggests
I2C_TPM_SDL and I2C_TPM__SDA GPIO PINs are locked.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I4f2a7014faeecd4701ea35ec77ef0e1692516b9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61499
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Subrata Banik 2022-01-31 14:31:33 +05:30
parent 7e91db7148
commit da2827779c
21 changed files with 78 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/brya/variants/agah/gpio.c
View File

@ -34,6 +34,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_NF(GPP_B5, NONE, DEEP, NF2),
/* B6 : ISH_I2C0_SDA ==> PCH_I2C_NVDD_GPU_SCL */
PAD_CFG_NF(GPP_B6, NONE, DEEP, NF2),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),

4
src/mainboard/google/brya/variants/anahera/gpio.c
View File

@ -70,6 +70,10 @@ static const struct pad_config override_gpio_table[] = {
/* F20 : EXT_PWR_GATE# ==> NC */
PAD_NC(GPP_F20, NONE),
/* H6 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H20 : IMGCLKOUT1 ==> NC */
PAD_NC(GPP_H20, NONE),
/* H21 : IMGCLKOUT2 ==> Privacy screen */

4
src/mainboard/google/brya/variants/anahera4es/gpio.c
View File

@ -26,6 +26,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_B5, NONE),
/* B6 : ISH_I2C0_SCL ==> NC */
PAD_NC(GPP_B6, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),

8
src/mainboard/google/brya/variants/banshee/gpio.c
View File

@ -51,8 +51,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_B5, NONE),
/* B6 : ISH_I2C0_SCL ==> NC */
PAD_NC(GPP_B6, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
/* B8 : ISH_I2C1_SCL ==> PCH_I2C_TPM_SCL */
/* B9 : NC */
/* B10 : NC */
/* B11 : PMCALERT# ==> EN_PP3300_WLAN */
@ -197,8 +195,10 @@ static const struct pad_config override_gpio_table[] = {
/* H3 : SX_EXIT_HOLDOFF# ==> WLAN_PCIE_WAKE_ODL */
/* H4 : I2C0_SDA ==> PCH_I2C_AUD_SDA */
/* H5 : I2C0_SCL ==> PCH_I2C_AUD_SCL */
/* H6 : I2C1_SDA ==> PCH_I2C_TCHSCR_SDA */
/* H7 : I2C1_SCL ==> PCH_I2C_TCHSCR_SCL */
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/baseboard/brask/gpio.c
View File

@ -269,9 +269,9 @@ static const struct pad_config gpio_table[] = {
/* H5 : I2C0_SCL ==> PCH_I2C_AUD_SCL */
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> WWAN_WLAN_COEX1 */
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF2),
/* H9 : I2C4_SCL ==> WWAN_WLAN_COEX2 */

2
src/mainboard/google/brya/variants/baseboard/brya/gpio.c
View File

@ -458,8 +458,6 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
}
static struct gpio_lock_config lockable_brya_gpios[] = {
{ GPP_B6, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SCL */
{ GPP_B7, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SDA */
{ GPP_A13, GPIO_LOCK_CONFIG }, /* GSC_PCH_INT_ODL */
{ GPP_E15, GPIO_LOCK_CONFIG }, /* PCH_WP_OD */
{ GPP_F11, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CLK_FPMCU_R */

4
src/mainboard/google/brya/variants/brya0/gpio.c
View File

@ -7,6 +7,10 @@
static const struct pad_config board_id0_1_overrides[] = {
/* B2 : VRALERT# ==> NC */
PAD_NC(GPP_B2, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),
/* C3 : SML0CLK ==> NC */

4
src/mainboard/google/brya/variants/brya4es/gpio.c
View File

@ -7,6 +7,10 @@
static const struct pad_config board_id0_1_overrides[] = {
/* B2 : VRALERT# ==> NC */
PAD_NC(GPP_B2, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),
/* C3 : SML0CLK ==> NC */

4
src/mainboard/google/brya/variants/felwinter/gpio.c
View File

@ -73,6 +73,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_F20, NONE),
/* F21 : EXT_PWR_GATE2# ==> NC */
PAD_NC(GPP_F21, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/gimble/gpio.c
View File

@ -79,6 +79,10 @@ static const struct pad_config override_gpio_table[] = {
/* F21 : EXT_PWR_GATE2# ==> NC */
PAD_NC(GPP_F21, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA_P2 */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL_P2 */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/gimble4es/gpio.c
View File

@ -32,6 +32,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_B5, NONE),
/* B6 : ISH_I2C0_SCL ==> NC */
PAD_NC(GPP_B6, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* C3 : SML0CLK ==> NC */
PAD_NC(GPP_C3, NONE),

4
src/mainboard/google/brya/variants/kano/gpio.c
View File

@ -63,6 +63,10 @@ static const struct pad_config override_gpio_table[] = {
/* F21 : EXT_PWR_GATE2# ==> NC */
PAD_NC(GPP_F21, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/primus/gpio.c
View File

@ -57,6 +57,10 @@ static const struct pad_config override_gpio_table[] = {
/* F20 : EXT_PWR_GATE# ==> NC */
PAD_NC(GPP_F20, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H19 : SRCCLKREQ4# ==> NC */
PAD_NC(GPP_H19, NONE),
/* H21 : IMGCLKOUT2 ==> NC */

4
src/mainboard/google/brya/variants/primus4es/gpio.c
View File

@ -24,6 +24,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_B2, NONE),
/* B3 : PROC_GP2 ==> eMMC_PERST_L */
PAD_CFG_GPO(GPP_B3, 1, DEEP),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),

4
src/mainboard/google/brya/variants/redrix/gpio.c
View File

@ -50,6 +50,10 @@ static const struct pad_config override_gpio_table[] = {
/* H3 : SX_EXIT_HOLDOFF# ==> NC */
PAD_NC(GPP_H3, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H20 : IMGCLKOUT1 ==> NC */
PAD_NC(GPP_H20, NONE),
/* H21 : IMGCLKOUT2 ==> Privacy screen */

4
src/mainboard/google/brya/variants/redrix4es/gpio.c
View File

@ -20,6 +20,10 @@ static const struct pad_config override_gpio_table[] = {
/* B3 : PROC_GP2 ==> NC */
PAD_NC(GPP_B3, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),

4
src/mainboard/google/brya/variants/taeko/gpio.c
View File

@ -97,6 +97,10 @@ static const struct pad_config override_gpio_table[] = {
/* F23 : BP105_CTRL ==> PP1050_CTRL */
PAD_CFG_NF(GPP_F23, NONE, DEEP, NF1),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/taeko4es/gpio.c
View File

@ -34,6 +34,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_B2, NONE),
/* B3 : PROC_GP2 ==> NC */
PAD_NC(GPP_B3, NONE),
/* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_B7, NONE, NF2, LOCK_CONFIG),
/* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_B8, NONE, NF2, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
PAD_NC(GPP_B15, NONE),

4
src/mainboard/google/brya/variants/taniks/gpio.c
View File

@ -115,6 +115,10 @@ static const struct pad_config override_gpio_table[] = {
/* F23 : BP105_CTRL ==> PP1050_CTRL */
PAD_CFG_NF(GPP_F23, NONE, DEEP, NF1),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */

4
src/mainboard/google/brya/variants/vell/gpio.c
View File

@ -47,6 +47,10 @@ static const struct pad_config override_gpio_table[] = {
/* F19 : NC */
PAD_NC(GPP_F19, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : IC1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H12 : I2C7_SDA ==> UWB_SDA */
PAD_CFG_NF(GPP_H12, NONE, DEEP, NF1),
/* H13 : I2C7_SCL ==> UWB_SCL */

4
src/mainboard/google/brya/variants/volmar/gpio.c
View File

@ -72,6 +72,10 @@ static const struct pad_config override_gpio_table[] = {
/* F21 : EXT_PWR_GATE2# ==> NC */
PAD_NC(GPP_F21, NONE),
/* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */
PAD_CFG_NF_LOCK(GPP_H6, NONE, NF1, LOCK_CONFIG),
/* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */
PAD_CFG_NF_LOCK(GPP_H7, NONE, NF1, LOCK_CONFIG),
/* H8 : I2C4_SDA ==> NC */
PAD_NC(GPP_H8, NONE),
/* H9 : I2C4_SCL ==> NC */