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superio/nuvoton: Adds a function to route pins 41-48 to UARTD 

Pins 41-48 default to being GPIs. This switches the internal
mux to connect them to UARTD.

Change-Id: I61393b8c35cbc664f6520f60eed09ba4bbede0dc
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/5963
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Dave Frodin 2014-06-09 12:33:24 -06:00
parent 7bf4f484c0
commit da2daef4b4
3 changed files with 62 additions and 3 deletions
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1
src/superio/nuvoton/nct5104d/Makefile.inc
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@ -19,3 +19,4 @@
##
ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += superio.c
romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += early_init.c

56
src/superio/nuvoton/nct5104d/early_init.c Normal file
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@ -0,0 +1,56 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Sage Electronic Engineering, LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/pnp.h>
#include <stdint.h>
#include "nct5104d.h"
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
static void pnp_enter_conf_state(device_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
static void pnp_exit_conf_state(device_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}
/* Route UARTD to pins 41-48 */
void nct5104d_enable_uartd(device_t dev)
{
u8 tmp;
u16 port = dev >> 8;
pnp_enter_conf_state(dev);
outb(0x1c, port);
tmp = inb(port + 1);
tmp |= 0x04;
outb(tmp, port + 1);
pnp_exit_conf_state(dev);
}

8
src/superio/nuvoton/nct5104d/nct5104d.h
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@ -19,8 +19,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_NUVOTON_NCT5104D_NCT5104D_H
#define SUPERIO_NUVOTON_NCT5104D_NCT5104D_H
#ifndef SUPERIO_NUVOTON_NCT5104D_H
#define SUPERIO_NUVOTON_NCT5104D_H
/* Logical Device Numbers (LDN). */
#define NCT5104D_FDC 0x00 /* FDC - not pinned out */
@ -42,4 +42,6 @@
#define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
#define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
#endif /* SUPERIO_NUVOTON_NCT5104D_NCT5104D_H */
void nct5104d_enable_uartd(device_t dev);
#endif /* SUPERIO_NUVOTON_NCT5104D_H */