Mainboard SMI S state handler was using the wrong defines
The PCH register bit definition for sleep type is a little confusing. For example, 7 is S5. To make this simpler for the mainbaord developer, the mainboard smi sleep hander is called as mainboard_sleep(slp_typ-2). A couple mainboard SMI handlers were using the PCH define for slp_ty, so S3 code would be run for S5 and S5 code would never be run. Change-Id: Iaecf96bfd48cf00153600cd119760364fbdfc29e Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/2514 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -59,11 +59,11 @@ void mainboard_smi_sleep(u8 slp_typ)
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u8 reg8;
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switch (slp_typ) {
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case SLP_TYP_S3:
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case SLP_TYP_S4:
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case 3:
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case 4:
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break;
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case SLP_TYP_S5:
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case 5:
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/* Turn off LED */
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reg8 = inb(SIO_GPIO_BASE_SET4);
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reg8 |= (1 << 5);
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@ -62,8 +62,8 @@ void mainboard_smi_sleep(u8 slp_typ)
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u8 reg8;
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switch (slp_typ) {
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case SLP_TYP_S3:
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case SLP_TYP_S4:
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case 3:
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case 4:
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/* Blink LED */
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it8772f_enter_conf();
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it8772f_sio_write(IT8772F_CONFIG_REG_LDN, IT8772F_GPIO);
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@ -79,7 +79,7 @@ void mainboard_smi_sleep(u8 slp_typ)
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it8772f_exit_conf();
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break;
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case SLP_TYP_S5:
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case 5:
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/* Turn off LED */
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reg8 = inb(SIO_GPIO_BASE_SET4);
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reg8 |= (1 << 5);
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